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Searched refs:DDRC_CTL (Results 1 – 2 of 2) sorted by relevance

/linux-4.4.14/arch/mips/pmcs-msp71xx/
Dmsp_setup.c69 DDRC_INDIRECT_WRITE(DDRC_CTL(10), 0xb, 1 << 16); in msp7120_reset()
/linux-4.4.14/arch/mips/include/asm/mach-pmcs-msp71xx/
Dmsp_regs.h635 #define DDRC_CTL(n) (0x40 + n) macro