Searched refs:DAVINCI_MMCCLK (Results 1 – 1 of 1) sorted by relevance
47 #define DAVINCI_MMCCLK 0x04 /* Memory Clock Control Register */ macro701 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK; in calculate_clk_divider()703 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()714 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKEN; in calculate_clk_divider()715 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()719 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK; in calculate_clk_divider()721 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()723 writel(temp | MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()1155 writel(0, host->base + DAVINCI_MMCCLK); in init_mmcsd_host()1156 writel(MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK); in init_mmcsd_host()