Searched refs:CSR_SA110_CNTL (Results 1 - 5 of 5) sorted by relevance

/linux-4.4.14/drivers/mtd/maps/
H A Ddc21285.c152 switch (*CSR_SA110_CNTL & (3<<14)) { init_dc21285()
203 * CSR_SA110_CNTL. The value is the number of wait cycles, or init_dc21285()
208 *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x000f0000) | (7 << 16)); init_dc21285()
210 *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x00f00000) | (7 << 20)); init_dc21285()
212 *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x0f000000) | (7 << 24)); init_dc21285()
/linux-4.4.14/arch/arm/mach-footbridge/
H A Ddc21285.c196 cntl = *CSR_SA110_CNTL & 0xffffdf07; dc21285_serr_irq()
197 *CSR_SA110_CNTL = cntl | SA110_CNTL_RXSERR; dc21285_serr_irq()
212 *CSR_SA110_CNTL &= 0xffffde07; dc21285_discard_irq()
321 *CSR_SA110_CNTL = (*CSR_SA110_CNTL & 0xffffde07) | dc21285_preinit()
H A Dcommon.c216 *CSR_SA110_CNTL &= ~(1 << 13); footbridge_restart()
222 *CSR_SA110_CNTL |= (1 << 13); footbridge_restart()
/linux-4.4.14/arch/arm/include/asm/hardware/
H A Ddec21285.h59 #define CSR_SA110_CNTL DC21285_IO(0x013c) macro
91 #define __footbridge_cfn_mode() (*CSR_SA110_CNTL & SA110_CNTL_PCICFN)
/linux-4.4.14/drivers/watchdog/
H A Dwdt285.c76 if (*CSR_SA110_CNTL & (1 << 13)) watchdog_open()
100 *CSR_SA110_CNTL |= 1 << 13; watchdog_open()

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