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Searched refs:CRT_DISPLAY_CTRL (Results 1 – 5 of 5) sorted by relevance

/linux-4.4.14/drivers/staging/sm750fb/
Dddk750_mode.c42 dispControl &= FIELD_CLEAR(CRT_DISPLAY_CTRL, CLK); in displayControlAdjust_SM750LE()
47 dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL41); in displayControlAdjust_SM750LE()
49 dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL65); in displayControlAdjust_SM750LE()
51 dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL80); in displayControlAdjust_SM750LE()
53 dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL80); in displayControlAdjust_SM750LE()
55 dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL74); in displayControlAdjust_SM750LE()
57 dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL108); in displayControlAdjust_SM750LE()
59 dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL108); in displayControlAdjust_SM750LE()
61 dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL25); in displayControlAdjust_SM750LE()
64 dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CRTSELECT, CRT); in displayControlAdjust_SM750LE()
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Dddk750_display.c71 ulDisplayCtrlReg = PEEK32(CRT_DISPLAY_CTRL); in setDisplayControl()
78 CRT_DISPLAY_CTRL, TIMING, ENABLE); in setDisplayControl()
79 POKE32(CRT_DISPLAY_CTRL, ulDisplayCtrlReg); in setDisplayControl()
82 CRT_DISPLAY_CTRL, PLANE, ENABLE); in setDisplayControl()
90 ulReservedBits = FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_1_MASK, ENABLE) | in setDisplayControl()
91 FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_2_MASK, ENABLE) | in setDisplayControl()
92 FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE) | in setDisplayControl()
93 FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_4_MASK, ENABLE); in setDisplayControl()
97 POKE32(CRT_DISPLAY_CTRL, ulDisplayCtrlReg); in setDisplayControl()
98 } while ((PEEK32(CRT_DISPLAY_CTRL) & ~ulReservedBits) != in setDisplayControl()
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Dsm750_hw.c358 reg = PEEK32(CRT_DISPLAY_CTRL); in hw_sm750_crtc_setMode()
359 reg = FIELD_VALUE(reg, CRT_DISPLAY_CTRL, FORMAT, var->bits_per_pixel >> 4); in hw_sm750_crtc_setMode()
360 POKE32(CRT_DISPLAY_CTRL, reg); in hw_sm750_crtc_setMode()
408 POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, DPMS, dpms)); in hw_sm750le_setBLANK()
409 POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb)); in hw_sm750le_setBLANK()
453 POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb)); in hw_sm750_setBLANK()
Dddk750_power.c10 value = PEEK32(CRT_DISPLAY_CTRL); in ddk750_setDPMS()
11 POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(value, CRT_DISPLAY_CTRL, in ddk750_setDPMS()
Dddk750_reg.h1642 #define CRT_DISPLAY_CTRL 0x080200 macro