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Searched refs:CP_PACKET0 (Results 1 – 7 of 7) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/radeon/
Dr300_cmdbuf.c75 OUT_RING(CP_PACKET0(R300_RE_CLIPRECT_TL_0, nr * 2 - 1)); in r300_emit_cliprects()
121 OUT_RING(CP_PACKET0(R300_RE_SCISSORS_TL, 1)); in r300_emit_cliprects()
148 OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); in r300_emit_cliprects()
152 OUT_RING(CP_PACKET0(RADEON_WAIT_UNTIL, 0)); in r300_emit_cliprects()
336 OUT_RING(CP_PACKET0(reg, sz - 1)); in r300_emit_carefully_checked_packet0()
380 OUT_RING(CP_PACKET0(reg, sz - 1)); in r300_emit_packet0()
411 OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); in r300_emit_vpu()
413 OUT_RING(CP_PACKET0(RADEON_WAIT_UNTIL, 0)); in r300_emit_vpu()
415 OUT_RING(CP_PACKET0(R300_VAP_PVS_STATE_FLUSH_REG, 0)); in r300_emit_vpu()
428 OUT_RING(CP_PACKET0(R300_VAP_PVS_STATE_FLUSH_REG, 0)); in r300_emit_vpu()
[all …]
Dradeon_state.c458 OUT_RING(CP_PACKET0(RADEON_RE_TOP_LEFT, 0)); in radeon_emit_clip_rect()
460 OUT_RING(CP_PACKET0(RADEON_RE_WIDTH_HEIGHT, 0)); in radeon_emit_clip_rect()
490 OUT_RING(CP_PACKET0(RADEON_PP_MISC, 6)); in radeon_emit_state()
498 OUT_RING(CP_PACKET0(RADEON_PP_CNTL, 2)); in radeon_emit_state()
502 OUT_RING(CP_PACKET0(RADEON_RB3D_COLORPITCH, 0)); in radeon_emit_state()
509 OUT_RING(CP_PACKET0(RADEON_SE_COORD_FMT, 0)); in radeon_emit_state()
516 OUT_RING(CP_PACKET0(RADEON_RE_LINE_PATTERN, 1)); in radeon_emit_state()
519 OUT_RING(CP_PACKET0(RADEON_SE_LINE_WIDTH, 0)); in radeon_emit_state()
526 OUT_RING(CP_PACKET0(RADEON_PP_LUM_MATRIX, 0)); in radeon_emit_state()
528 OUT_RING(CP_PACKET0(RADEON_PP_ROT_MATRIX_0, 1)); in radeon_emit_state()
[all …]
Dradeon_drv.h1914 #define CP_PACKET0( reg, n ) \ macro
1930 OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
1936 OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
1942 OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
1949 OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
1955 OUT_RING(CP_PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0)); \
1958 OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); \
1965 OUT_RING(CP_PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0)); \
1968 OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); \
1975 OUT_RING(CP_PACKET0(RADEON_RB3D_ZCACHE_CTLSTAT, 0)); \
[all …]
Dr300d.h31 #define CP_PACKET0 0x00000000 macro
60 #define PACKET0(reg, n) (CP_PACKET0 | \
Drv515d.h174 #define CP_PACKET0 0x00000000 macro
200 #define PACKET0(reg, n) (CP_PACKET0 | \
Dr100d.h31 #define CP_PACKET0 0x00000000 macro
59 #define PACKET0(reg, n) (CP_PACKET0 | \
Dradeon_cp.c619 OUT_RING(CP_PACKET0(R300_CP_RESYNC_ADDR, 1)); in radeon_do_cp_start()
628 OUT_RING(CP_PACKET0(RADEON_ISYNC_CNTL, 0)); in radeon_do_cp_start()
669 OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); in radeon_do_cp_stop()