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Searched refs:CP_ME_CNTL__PFP_HALT_MASK (Results 1 – 6 of 6) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Dcik.c1181 …WREG32(mmCP_ME_CNTL, CP_ME_CNTL__ME_HALT_MASK | CP_ME_CNTL__PFP_HALT_MASK | CP_ME_CNTL__CE_HALT_MA… in cik_gpu_soft_reset()
1387 CP_ME_CNTL__PFP_HALT_MASK | CP_ME_CNTL__CE_HALT_MASK); in cik_gpu_pci_config_reset()
Dvi.c878 CP_ME_CNTL__PFP_HALT_MASK | CP_ME_CNTL__CE_HALT_MASK); in vi_gpu_pci_config_reset()
Dgfx_v7_0.c2747 …WREG32(mmCP_ME_CNTL, (CP_ME_CNTL__ME_HALT_MASK | CP_ME_CNTL__PFP_HALT_MASK | CP_ME_CNTL__CE_HALT_M… in gfx_v7_0_cp_gfx_enable()
5256 …WREG32(mmCP_ME_CNTL, CP_ME_CNTL__ME_HALT_MASK | CP_ME_CNTL__PFP_HALT_MASK | CP_ME_CNTL__CE_HALT_MA… in gfx_v7_0_soft_reset()
/linux-4.4.14/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h3049 #define CP_ME_CNTL__PFP_HALT_MASK 0x4000000 macro
Dgfx_8_1_sh_mask.h4185 #define CP_ME_CNTL__PFP_HALT_MASK 0x4000000 macro
Dgfx_8_0_sh_mask.h3663 #define CP_ME_CNTL__PFP_HALT_MASK 0x4000000 macro