Searched refs:CP_MEC_CNTL (Results 1 – 4 of 4) sorted by relevance
| /linux-4.4.14/drivers/gpu/drm/amd/amdgpu/ |
| D | vi.c | 729 tmp = REG_SET_FIELD(tmp, CP_MEC_CNTL, MEC_ME1_HALT, 1); in vi_gpu_soft_reset()
730 tmp = REG_SET_FIELD(tmp, CP_MEC_CNTL, MEC_ME2_HALT, 1); in vi_gpu_soft_reset()
872 tmp = REG_SET_FIELD(tmp, CP_MEC_CNTL, MEC_ME1_HALT, 1); in vi_gpu_pci_config_reset()
873 tmp = REG_SET_FIELD(tmp, CP_MEC_CNTL, MEC_ME2_HALT, 1); in vi_gpu_pci_config_reset()
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| D | cz_smc.c | 280 tmp = REG_SET_FIELD(tmp, CP_MEC_CNTL, MEC_ME1_HALT, 1); in cz_load_mec_firmware()
281 tmp = REG_SET_FIELD(tmp, CP_MEC_CNTL, MEC_ME2_HALT, 1); in cz_load_mec_firmware()
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| /linux-4.4.14/drivers/gpu/drm/radeon/ |
| D | cikd.h | 1096 #define CP_MEC_CNTL 0x8234 macro
1100 #define CP_MEC_CNTL 0x8234 macro
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| D | cik.c | 4639 WREG32(CP_MEC_CNTL, 0); in cik_cp_compute_enable()
4650 WREG32(CP_MEC_CNTL, (MEC_ME1_HALT | MEC_ME2_HALT)); in cik_cp_compute_enable()
5363 WREG32(CP_MEC_CNTL, MEC_ME1_HALT | MEC_ME2_HALT); in cik_gpu_soft_reset()
5567 WREG32(CP_MEC_CNTL, MEC_ME1_HALT | MEC_ME2_HALT); in cik_gpu_pci_config_reset()
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