Searched refs:CPLL_CFG0_SW_CFG (Results 1 - 2 of 2) sorted by relevance

/linux-4.4.14/arch/mips/include/asm/mach-ralink/
H A Dmt7620.h59 #define CPLL_CFG0_SW_CFG BIT(31) macro
/linux-4.4.14/arch/mips/ralink/
H A Dmt7620.c296 if ((reg & CPLL_CFG0_SW_CFG) == 0) mt7620_get_cpu_pll_rate()

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