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Searched refs:CON0_BASE_EN (Results 1 – 1 of 1) sorted by relevance

/linux-4.4.14/drivers/clk/mediatek/
Dclk-pll.c27 #define CON0_BASE_EN BIT(0) macro
63 return (readl(pll->base_addr + REG_CON0) & CON0_BASE_EN) != 0; in mtk_pll_is_prepared()
96 pll_en = readl(pll->base_addr + REG_CON0) & CON0_BASE_EN; in mtk_pll_set_rate_regs()
263 r &= ~CON0_BASE_EN; in mtk_pll_unprepare()