Searched refs:CMR (Results 1 - 10 of 10) sorted by relevance

/linux-4.4.14/drivers/pwm/
H A Dpwm-atmel-tcb.c92 cmr = __raw_readl(regs + ATMEL_TC_REG(group, CMR)); atmel_tcb_pwm_request()
113 __raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR)); atmel_tcb_pwm_request()
155 cmr = __raw_readl(regs + ATMEL_TC_REG(group, CMR)); atmel_tcb_pwm_disable()
172 __raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR)); atmel_tcb_pwm_disable()
211 cmr = __raw_readl(regs + ATMEL_TC_REG(group, CMR)); atmel_tcb_pwm_enable()
219 /* Set CMR flags according to given polarity */ atmel_tcb_pwm_enable()
254 __raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR)); atmel_tcb_pwm_enable()
H A Dpwm-atmel.c35 /* Bit field in CMR */
148 /* It is necessary to preserve CPOL, inside CMR */ atmel_pwm_config()
177 * register, it needs to set bit 10 of CMR to 0 atmel_pwm_config_v1()
/linux-4.4.14/drivers/atm/
H A Dzatm.c128 #define zwait while (zin(CMR) & uPD98401_BUSY)
145 (uPD98401_IA_TGT_CM << uPD98401_IA_TGT_SHIFT) | addr,CMR); zpokel()
153 (uPD98401_IA_TGT_CM << uPD98401_IA_TGT_SHIFT) | addr,CMR); zpeekl()
246 CMR); refill_pool()
511 zout(uPD98401_OPEN_CHAN,CMR); open_rx_first()
513 DPRINTK("0x%x 0x%x\n",zin(CMR),zin(CER)); open_rx_first()
514 chan = (zin(CMR) & uPD98401_CHAN_ADDR) >> uPD98401_CHAN_ADDR_SHIFT; open_rx_first()
574 zout(uPD98401_NOP,CMR); close_rx()
576 zout(uPD98401_NOP,CMR); close_rx()
582 uPD98401_CHAN_ADDR_SHIFT),CMR); close_rx()
586 uPD98401_CHAN_ADDR_SHIFT),CMR); close_rx()
588 if (!(zin(CMR) & uPD98401_CHAN_ADDR)) close_rx()
702 uPD98401_CHAN_ADDR_SHIFT),CMR); do_tx()
893 zout(uPD98401_DEACT_CHAN | (chan << uPD98401_CHAN_ADDR_SHIFT),CMR); close_tx()
896 zout(uPD98401_CLOSE_CHAN | (chan << uPD98401_CHAN_ADDR_SHIFT),CMR); close_tx()
898 if (!(zin(CMR) & uPD98401_CHAN_ADDR)) close_tx()
928 zout(uPD98401_OPEN_CHAN,CMR); open_tx_first()
930 DPRINTK("0x%x 0x%x\n",zin(CMR),zin(CER)); open_tx_first()
931 chan = (zin(CMR) & uPD98401_CHAN_ADDR) >> uPD98401_CHAN_ADDR_SHIFT; open_tx_first()
1558 (uPD98401_IA_TGT_PHY << uPD98401_IA_TGT_SHIFT) | addr,CMR); zatm_phy_put()
1569 (uPD98401_IA_TGT_PHY << uPD98401_IA_TGT_SHIFT) | addr,CMR); zatm_phy_get()
H A DuPD98402.h46 /* CMR is at 0x00 */
/linux-4.4.14/drivers/clocksource/
H A Dtcb_clksrc.c119 ATMEL_TC_WAVESEL_UP_AUTO, regs + ATMEL_TC_REG(2, CMR)); tc_set_oneshot()
141 regs + ATMEL_TC_REG(2, CMR)); tc_set_periodic()
247 tcaddr + ATMEL_TC_REG(0, CMR)); tcb_setup_dual_chan()
257 tcaddr + ATMEL_TC_REG(1, CMR)); tcb_setup_dual_chan()
273 tcaddr + ATMEL_TC_REG(0, CMR)); tcb_setup_single_chan()
/linux-4.4.14/include/linux/
H A Datmel_tc.h141 /* Both modes share some CMR bits */
159 /* CAPTURE mode CMR bits */
180 /* WAVEFORM mode CMR bits */
/linux-4.4.14/drivers/tty/
H A Dsynclink.c340 #define CMR 0x02 /* Channel mode Register */ macro
1175 /* clear CMR:13 to start echoing RxD to TxD */ mgsl_isr_receive_status()
1177 usc_OutReg(info, CMR, info->cmr_value); mgsl_isr_receive_status()
2588 * station in the 'loop' by setting CMR:13. Upon mgsl_txenable()
4652 ** Channel Mode Register (CMR) usc_set_sdlc_mode()
4672 /* Channel mode Register (CMR) usc_set_sdlc_mode()
4691 * CMR <15> 0 Don't send CRC on Tx Underrun usc_set_sdlc_mode()
4692 * CMR <14> x undefined usc_set_sdlc_mode()
4693 * CMR <13> 0 Send preamble before openning sync usc_set_sdlc_mode()
4694 * CMR <12> 0 Send 8-bit syncs, 1=send Syncs per TxLength usc_set_sdlc_mode()
4697 * CMR <11-8) 0100 MonoSync usc_set_sdlc_mode()
4730 usc_OutReg( info, CMR, RegValue ); usc_set_sdlc_mode()
5882 /* Channel mode Register (CMR) usc_set_async_mode()
5897 usc_OutReg( info, CMR, RegValue ); usc_set_async_mode()
6886 /* set CMR:13 to start transmit when mgsl_load_tx_dma_buffer()
7594 /* clear CMR:13 to 0 to start echoing RxData to TxData */ usc_loopmode_send_done()
7596 usc_OutReg(info, CMR, info->cmr_value); usc_loopmode_send_done()
7609 /* for HDLC/SDLC LoopMode, setting CMR:13 after the transmitter is enabled
7611 * we must clear CMR:13 to begin repeating TxData to RxData
7617 /* enable RxAbort irq. On next RxAbort, clear CMR:13 to usc_loopmode_insert_request()
7623 /* set CMR:13 to insert into loop on next GoAhead (RxAbort) */ usc_loopmode_insert_request()
7625 usc_OutReg(info, CMR, info->cmr_value); usc_loopmode_insert_request()
/linux-4.4.14/sound/soc/atmel/
H A Datmel_ssc_dai.c757 ssc_writel(ssc_p->ssc->regs, CMR, ssc_p->cmr_div); atmel_ssc_hw_params()
841 ssc_p->ssc_state.ssc_cmr = ssc_readl(ssc_p->ssc->regs, CMR); atmel_ssc_suspend()
867 ssc_writel(ssc_p->ssc->regs, CMR, ssc_p->ssc_state.ssc_cmr); atmel_ssc_resume()
/linux-4.4.14/drivers/video/fbdev/
H A Dimsttfb.c76 CMR = 28, /* 0x70 */ enumerator in enum:__anon11126
722 write_reg_le32(par->dc_regs, CMR, 0x00ff); set_imstt_regvals()
726 write_reg_le32(par->dc_regs, CMR, 0x01ff); set_imstt_regvals()
/linux-4.4.14/sound/spi/
H A Dat73c213.c196 ssc_writel(chip->ssc->regs, CMR, ssc_div/2); snd_at73c213_set_bitrate()

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