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Searched refs:CLOCK_CNTL_DATA (Results 1 – 7 of 7) sorted by relevance

/linux-4.4.14/include/video/
Daty128.h13 #define CLOCK_CNTL_DATA 0x000c macro
Dmach64.h142 #define CLOCK_CNTL_DATA CLOCK_CNTL + 2 macro
Dradeon.h307 #define CLOCK_CNTL_DATA 0x000C macro
/linux-4.4.14/drivers/video/fbdev/aty/
Dradeon_pm.c1483 OUTREG8(CLOCK_CNTL_DATA + 1, (tmp >> 8) & 0xff); in radeon_pm_start_mclk_sclk()
1518 OUTREG8(CLOCK_CNTL_DATA + 1, (tmp >> 8) & 0xff); in radeon_pm_start_mclk_sclk()
1639 OUTREG8(CLOCK_CNTL_DATA, 0); in radeon_pm_restore_pixel_pll()
1657 OUTREG8(CLOCK_CNTL_DATA + 1, (tmp >> 8) & 0xff); in radeon_pm_restore_pixel_pll()
2278 OUTREG8(CLOCK_CNTL_DATA + 1, (tmp >> 8) & 0xff);
2301 OUTREG8(CLOCK_CNTL_DATA + 1, (tmp >> 8) & 0xff);
2431 OUTREG8(CLOCK_CNTL_DATA, 0);
2455 OUTREG8(CLOCK_CNTL_DATA + 1, 0xbc);
Dmach64_ct.c29 res = aty_ld_8(CLOCK_CNTL_DATA, par); in aty_ld_pll_ct()
38 aty_st_8(CLOCK_CNTL_DATA, val & PLL_DATA, par); in aty_st_pll_ct()
Dradeon_base.c296 (void)INREG(CLOCK_CNTL_DATA); in radeon_pll_errata_after_index_slow()
311 tmp = INREG(CLOCK_CNTL_DATA); in radeon_pll_errata_after_data_slow()
335 data = INREG(CLOCK_CNTL_DATA); in __INPLL()
344 OUTREG(CLOCK_CNTL_DATA, val); in __OUTPLL()
Daty128fb.c577 return aty_ld_le32(CLOCK_CNTL_DATA); in _aty_ld_pll()
585 aty_st_le32(CLOCK_CNTL_DATA, val); in _aty_st_pll()