Searched refs:CLK_TOP_MSDC50_0_H_SEL (Results 1 - 8 of 8) sorted by relevance

/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dmt8173-clk.h113 #define CLK_TOP_MSDC50_0_H_SEL 95 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
H A Dmt8173-clk.h113 #define CLK_TOP_MSDC50_0_H_SEL 95 macro
/linux-4.4.14/include/dt-bindings/clock/
H A Dmt8173-clk.h113 #define CLK_TOP_MSDC50_0_H_SEL 95 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dmt8173-clk.h113 #define CLK_TOP_MSDC50_0_H_SEL 95 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dmt8173-clk.h113 #define CLK_TOP_MSDC50_0_H_SEL 95 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dmt8173-clk.h113 #define CLK_TOP_MSDC50_0_H_SEL 95 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dmt8173-clk.h113 #define CLK_TOP_MSDC50_0_H_SEL 95 macro
/linux-4.4.14/drivers/clk/mediatek/
H A Dclk-mt8173.c547 MUX_GATE(CLK_TOP_MSDC50_0_H_SEL, "msdc50_0_h_sel", msdc50_0_h_parents, 0x0070, 8, 3, 15),

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