Searched refs:CLK_SPI2 (Results 1 - 32 of 32) sorted by relevance

/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dexynos5250.h112 #define CLK_SPI2 306 macro
H A Dexynos5420.h82 #define CLK_SPI2 273 macro
H A Dexynos4.h169 #define CLK_SPI2 329 macro
H A Dexynos4415.h271 #define CLK_SPI2 276 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
H A Dexynos5250.h112 #define CLK_SPI2 306 macro
H A Dexynos5420.h82 #define CLK_SPI2 273 macro
H A Dexynos4.h169 #define CLK_SPI2 329 macro
H A Dexynos4415.h271 #define CLK_SPI2 276 macro
/linux-4.4.14/include/dt-bindings/clock/
H A Dexynos5250.h112 #define CLK_SPI2 306 macro
H A Dexynos5420.h82 #define CLK_SPI2 273 macro
H A Dexynos4.h169 #define CLK_SPI2 329 macro
H A Dexynos4415.h271 #define CLK_SPI2 276 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dexynos5250.h112 #define CLK_SPI2 306 macro
H A Dexynos5420.h82 #define CLK_SPI2 273 macro
H A Dexynos4.h169 #define CLK_SPI2 329 macro
H A Dexynos4415.h271 #define CLK_SPI2 276 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dexynos5250.h112 #define CLK_SPI2 306 macro
H A Dexynos5420.h82 #define CLK_SPI2 273 macro
H A Dexynos4.h169 #define CLK_SPI2 329 macro
H A Dexynos4415.h271 #define CLK_SPI2 276 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dexynos5250.h112 #define CLK_SPI2 306 macro
H A Dexynos5420.h82 #define CLK_SPI2 273 macro
H A Dexynos4.h169 #define CLK_SPI2 329 macro
H A Dexynos4415.h271 #define CLK_SPI2 276 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dexynos5250.h112 #define CLK_SPI2 306 macro
H A Dexynos5420.h82 #define CLK_SPI2 273 macro
H A Dexynos4.h169 #define CLK_SPI2 329 macro
H A Dexynos4415.h271 #define CLK_SPI2 276 macro
/linux-4.4.14/drivers/clk/samsung/
H A Dclk-exynos5250.c635 GATE(CLK_SPI2, "spi2", "div_aclk66", GATE_IP_PERIC, 18, 0, 0),
H A Dclk-exynos4415.c841 GATE(CLK_SPI2, "spi2", "div_aclk_100", GATE_IP_PERIL, 18, 0, 0),
H A Dclk-exynos5420.c1059 GATE(CLK_SPI2, "spi2", "mout_user_aclk66_peric",
H A Dclk-exynos4.c1013 GATE(CLK_SPI2, "spi2", "aclk100", GATE_IP_PERIL, 18,

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