Searched refs:CLK_MOUT_MEM0_PLL_DIV2 (Results 1 - 8 of 8) sorted by relevance

/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dexynos5433.h221 #define CLK_MOUT_MEM0_PLL_DIV2 13 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
H A Dexynos5433.h221 #define CLK_MOUT_MEM0_PLL_DIV2 13 macro
/linux-4.4.14/include/dt-bindings/clock/
H A Dexynos5433.h221 #define CLK_MOUT_MEM0_PLL_DIV2 13 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dexynos5433.h221 #define CLK_MOUT_MEM0_PLL_DIV2 13 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dexynos5433.h221 #define CLK_MOUT_MEM0_PLL_DIV2 13 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dexynos5433.h221 #define CLK_MOUT_MEM0_PLL_DIV2 13 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dexynos5433.h221 #define CLK_MOUT_MEM0_PLL_DIV2 13 macro
/linux-4.4.14/drivers/clk/samsung/
H A Dclk-exynos5433.c1125 MUX(CLK_MOUT_MEM0_PLL_DIV2, "mout_mem0_pll_div2", mout_mem0_pll_div2_p,

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