Searched refs:CLK_DIV_PCLK_DBG_AUD (Results 1 - 8 of 8) sorted by relevance

/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dexynos5433.h776 #define CLK_DIV_PCLK_DBG_AUD 5 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
H A Dexynos5433.h776 #define CLK_DIV_PCLK_DBG_AUD 5 macro
/linux-4.4.14/include/dt-bindings/clock/
H A Dexynos5433.h776 #define CLK_DIV_PCLK_DBG_AUD 5 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dexynos5433.h776 #define CLK_DIV_PCLK_DBG_AUD 5 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dexynos5433.h776 #define CLK_DIV_PCLK_DBG_AUD 5 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dexynos5433.h776 #define CLK_DIV_PCLK_DBG_AUD 5 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dexynos5433.h776 #define CLK_DIV_PCLK_DBG_AUD 5 macro
/linux-4.4.14/drivers/clk/samsung/
H A Dclk-exynos5433.c2961 DIV(CLK_DIV_PCLK_DBG_AUD, "div_pclk_dbg_aud", "div_aud_ca5", DIV_AUD0,

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