Searched refs:CLK_CTL (Results 1 – 6 of 6) sorted by relevance
| /linux-4.4.14/drivers/mmc/host/ |
| D | rtsx_pci_sdmmc.c | 630 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CHANGE_CLK, CHANGE_CLK); in sd_change_phase()
640 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CHANGE_CLK, 0); in sd_change_phase()
991 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
995 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1003 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
1007 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1019 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
1023 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1033 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
1037 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
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| /linux-4.4.14/drivers/staging/rts5208/ |
| D | rtsx_card.c | 681 rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ); in switch_ssc_clock()
701 retval = rtsx_write_register(chip, CLK_CTL, CLK_LOW_FREQ, 0); in switch_ssc_clock()
799 retval = rtsx_write_register(chip, CLK_CTL, 0xFF, CLK_LOW_FREQ); in switch_normal_clock()
846 retval = rtsx_write_register(chip, CLK_CTL, 0xFF, 0); in switch_normal_clock()
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| D | rtsx_card.h | 831 #define CLK_CTL 0xFC02 macro
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| D | sd.c | 926 retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK,
950 retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK, 0);
977 retval = rtsx_write_register(chip, CLK_CTL,
1029 retval = rtsx_write_register(chip, CLK_CTL,
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| /linux-4.4.14/drivers/mfd/ |
| D | rtsx_pcr.c | 708 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in rtsx_pci_switch_clock()
730 err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rtsx_pci_switch_clock()
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| /linux-4.4.14/include/linux/mfd/ |
| D | rtsx_pci.h | 459 #define CLK_CTL 0xFC02 macro
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