Searched refs:CLASS2_ENABLE_MAILBOX_INTR (Results 1 - 4 of 4) sorted by relevance

/linux-4.4.14/arch/powerpc/platforms/cell/spufs/
H A Dhw_ops.c79 spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_INTR); spu_hw_mbox_stat_poll()
110 spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_INTR); spu_hw_ibox_read()
H A Dbacking_ops.c111 CLASS2_ENABLE_MAILBOX_INTR; spu_backing_mbox_stat_poll()
145 ctx->csa.priv1.int_mask_class2_RW |= CLASS2_ENABLE_MAILBOX_INTR; spu_backing_ibox_read()
H A Dswitch.c1698 spu_int_stat_clear(spu, 2, CLASS2_ENABLE_MAILBOX_INTR); check_ppuint_mb_stat()
/linux-4.4.14/arch/powerpc/include/asm/
H A Dspu.h522 #define CLASS2_ENABLE_MAILBOX_INTR 0x1L macro

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