Searched refs:CGU0_DIV (Results 1 – 4 of 4) sorted by relevance
190 u32 div = bfin_read32(CGU0_DIV); in sys_clk_get_rate()238 u32 div = bfin_read32(CGU0_DIV); in sys_clk_set_rate()250 clk_reg_write_mask(CGU0_DIV, div << clk->shift, in sys_clk_set_rate()
454 bfin_write32(CGU0_DIV, cgu_div); in init_cgu()461 bfin_write32(CGU0_DIV, cgu_div | UPDT); in init_cgu()
77 csel = bfin_read32(CGU0_DIV) & 0x1F; in bfin_init_tables()
3207 #define CGU0_DIV 0xFFCA8008 /* CGU0 Divisor Register */ macro