Searched refs:CDCLK_FREQ_337_308 (Results 1 – 2 of 2) sorted by relevance
5688 val |= CDCLK_FREQ_337_308; in skl_dpll0_enable()5695 val = CDCLK_FREQ_337_308 | skl_cdclk_decimal(min_freq); in skl_dpll0_enable()5783 freq_select = CDCLK_FREQ_337_308; in skl_set_cdclk()6721 case CDCLK_FREQ_337_308: in skylake_get_display_clock_speed()6733 case CDCLK_FREQ_337_308: in skylake_get_display_clock_speed()
7398 #define CDCLK_FREQ_337_308 (2<<26) macro