Searched refs:CCSR (Results 1 - 10 of 10) sorted by relevance
| /linux-4.4.14/drivers/clk/pxa/ |
| H A D | clk-pxa27x.c | 54 * Get the clock frequency as reflected by CCSR and the turbo flag.
88 unsigned long ccsr = CCSR; pxa27x_is_ppll_disabled()
154 unsigned long ccsr = CCSR; clk_pxa27x_cpll_get_rate()
174 unsigned long ccsr = CCSR; clk_pxa27x_lcd_base_get_rate()
196 unsigned long ccsr = CCSR; clk_pxa27x_lcd_base_get_parent()
225 unsigned long ccsr = CCSR; clk_pxa27x_core_get_rate()
245 unsigned long ccsr = CCSR; clk_pxa27x_core_get_parent()
266 unsigned long ccsr = CCSR; clk_pxa27x_run_get_rate()
288 unsigned long ccsr = CCSR; clk_pxa27x_system_bus_get_rate()
305 unsigned long ccsr = CCSR; clk_pxa27x_system_bus_get_parent()
322 unsigned long ccsr = CCSR; clk_pxa27x_memory_get_rate()
341 unsigned long ccsr = CCSR; clk_pxa27x_memory_get_parent()
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| /linux-4.4.14/arch/powerpc/sysdev/ |
| H A D | fsl_msi.h | 39 u32 msiir_offset; /* Offset of MSIIR, relative to start of CCSR */
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| H A D | fsl_pci.c | 312 * inside CCSR, so the ATMU that covers all of CCSR is used. But if setup_pci_atmu()
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| /linux-4.4.14/drivers/net/wireless/orinoco/ |
| H A D | spectrum_cs.c | 73 * Reset the card using configuration registers COR and CCSR.
99 /* Read CCSR */ spectrum_reset()
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| /linux-4.4.14/arch/arm/mach-pxa/include/mach/ |
| H A D | pxa2xx-regs.h | 138 #define CCSR __REG(0x4130000C) /* Core Clock Status Register */ macro
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| /linux-4.4.14/drivers/clk/imx/ |
| H A D | clk-imx6sl.c | 20 #define CCSR 0xc macro
135 if (readl_relaxed(ccm_base + CCSR) & BM_CCSR_PLL1_SW_CLK_SEL) { imx6sl_get_arm_divider_for_wait()
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| /linux-4.4.14/drivers/tty/ |
| H A D | synclink.c | 341 #define CCSR 0x04 /* Channel Command/status Register */ macro
2590 * the OnLoop indicator (CCSR:7) should go active mgsl_txenable()
5016 /* Channel Control/status Register (CCSR) usc_set_sdlc_mode()
5034 usc_OutReg( info, CCSR, 0x1020 ); usc_set_sdlc_mode()
5429 usc_OutReg( info, CCSR, (u16)(usc_InReg(info,CCSR) | BIT13) ); usc_process_rxoverrun_sync()
5454 usc_OutReg( info, CCSR, (u16)(usc_InReg(info,CCSR) | BIT13) ); usc_process_rxoverrun_sync()
5484 usc_OutReg( info, CCSR, (u16)(usc_InReg(info,CCSR) | BIT13) ); usc_stop_receiver()
5511 usc_OutReg( info, CCSR, (u16)(usc_InReg(info,CCSR) | BIT13) ); usc_start_receiver()
5550 usc_OutReg( info, CCSR, 0x1020 ); usc_start_receiver()
6013 /* Channel Control/status Register (CCSR) usc_set_async_mode()
6031 usc_OutReg( info, CCSR, 0x0020 ); usc_set_async_mode()
7632 return usc_InReg( info, CCSR ) & BIT7 ? 1 : 0 ; usc_loopmode_active()
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| /linux-4.4.14/drivers/iommu/ |
| H A D | fsl_pamu.h | 32 /* PAMU CCSR space */
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| /linux-4.4.14/drivers/net/ethernet/natsemi/ |
| H A D | ns83820.c | 348 #define CCSR 0xcc macro
744 writel(0x0001, dev->base + CCSR); ns83820_setup_rx()
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| /linux-4.4.14/drivers/net/ethernet/8390/ |
| H A D | axnet_cs.c | 337 Bit 2 of CCSR is active low. */ axnet_config()
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