Searched refs:CACHE_LINESIZE (Results 1 – 5 of 5) sorted by relevance
| /linux-4.4.14/arch/unicore32/mm/ |
| D | cache-ucv2.S | 57 andn r0, r0, #CACHE_LINESIZE - 1 @ Safety check
62 andn r1, r1, #CACHE_LINESIZE - 1
63 add r1, r1, #CACHE_LINESIZE
67 add r0, r0, #CACHE_LINESIZE
68 sub.a r1, r1, #CACHE_LINESIZE
97 andn r0, r0, #CACHE_LINESIZE - 1 @ Safety check
102 andn r1, r1, #CACHE_LINESIZE - 1
103 add r1, r1, #CACHE_LINESIZE
116 add r0, r0, #CACHE_LINESIZE
117 add r10, r10, #CACHE_LINESIZE
[all …]
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| D | proc-ucv2.S | 80 add r0, r0, #CACHE_LINESIZE
81 add r10, r10, #CACHE_LINESIZE
82 sub.a r1, r1, #CACHE_LINESIZE
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| D | proc-macros.S | 24 #define CACHE_LINESIZE 32 macro
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| /linux-4.4.14/arch/arm64/include/asm/ |
| D | cachetype.h | 62 #define CACHE_LINESIZE(x) (16 << CCSIDR_EL1_LINESIZE(x)) macro
71 return CACHE_LINESIZE(cache_get_ccsidr(1L)); in icache_get_linesize()
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| /linux-4.4.14/arch/arm64/kernel/ |
| D | cacheinfo.c | 75 this_leaf->coherency_line_size = CACHE_LINESIZE(tmp); in ci_leaf_init()
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