Searched refs:BXT_CDCLK_CD2X_DIV_SEL_1_5 (Results 1 – 2 of 2) sorted by relevance
7404 #define BXT_CDCLK_CD2X_DIV_SEL_1_5 (1<<22) macro
5487 divider = BXT_CDCLK_CD2X_DIV_SEL_1_5; in broxton_set_cdclk()6762 case BXT_CDCLK_CD2X_DIV_SEL_1_5: in broxton_get_display_clock_speed()