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Searched refs:BIT7 (Results 1 – 24 of 24) sorted by relevance

/linux-4.4.14/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
Dpwrseq.h54 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0 \
115 PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x80, BIT7 \
174 PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x80, BIT7 \
235 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7 \
240 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0 \
304 PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0 \
307 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6|BIT7, 0 \
423 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0 \
521 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0 \
562 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0 \
[all …]
/linux-4.4.14/drivers/video/fbdev/via/
Dvia_utility.c152 viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7); in viafb_set_gamma_table()
162 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); in viafb_set_gamma_table()
207 viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7); in viafb_get_gamma_table()
217 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); in viafb_get_gamma_table()
Dlcd.c390 viafb_write_reg_mask(CRA2, VIACR, 0xC0, BIT7 + BIT6); in load_lcd_scaling()
402 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT7); in load_lcd_scaling()
625 viafb_write_reg_mask(CRD3, VIACR, 0xC0, BIT6 + BIT7); in integrated_lvds_disable()
634 viafb_write_reg_mask(CR91, VIACR, 0xC0, BIT6 + BIT7); in integrated_lvds_disable()
641 viafb_write_reg_mask(CRD2, VIACR, 0x80, BIT7); in integrated_lvds_disable()
653 viafb_write_reg_mask(CRD2, VIACR, 0xC0, BIT6 + BIT7); in integrated_lvds_disable()
677 viafb_write_reg_mask(CR91, VIACR, 0, BIT6 + BIT7); in integrated_lvds_enable()
686 viafb_write_reg_mask(CRD3, VIACR, 0, BIT6 + BIT7); in integrated_lvds_enable()
696 viafb_write_reg_mask(CRD2, VIACR, 0, BIT7); in integrated_lvds_enable()
708 viafb_write_reg_mask(CRD2, VIACR, 0, BIT6 + BIT7); in integrated_lvds_enable()
[all …]
Ddvi.c69 viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT6 + BIT7); in viafb_tmds_trasmitter_identify()
76 BIT5 + BIT6 + BIT7); in viafb_tmds_trasmitter_identify()
467 viafb_write_reg_mask(CR91, VIACR, 0, BIT7); in viafb_dvi_enable()
Dhw.c481 viafb_write_reg_mask(CR11, VIACR, BIT7, BIT7); in viafb_lock_crt()
486 viafb_write_reg_mask(CR11, VIACR, 0, BIT7); in viafb_unlock_crt()
960 viafb_write_reg_mask(CR03, VIACR, 0x80, BIT7); in load_fix_bit_crtc_reg()
1684 viafb_write_reg_mask(SR1B, VIASR, 0x00, BIT7 + BIT6); in viafb_init_dac()
1691 viafb_write_reg_mask(SR1B, VIASR, 0xC0, BIT7 + BIT6); in viafb_init_dac()
2049 viafb_write_reg_mask(CR6A, VIACR, BIT7, BIT7); in enable_second_display_channel()
2057 viafb_write_reg_mask(CR6A, VIACR, 0x00, BIT7); in disable_second_display_channel()
Dshare.h35 #define BIT7 0x80 macro
/linux-4.4.14/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_hw.h231 #define IMR_COMDOK BIT7
248 #define TPPoll_HQ BIT7
378 #define RRSR_18M BIT7
/linux-4.4.14/drivers/net/wireless/realtek/rtlwifi/btcoexist/
Dhalbt_precomp.h55 #define BIT7 0x00000080 macro
Dhalbtc8723b2ant.h33 #define BT_INFO_8723B_2ANT_B_FTP BIT7
Dhalbtc8821a2ant.h30 #define BT_INFO_8821A_2ANT_B_FTP BIT7
Dhalbtc8723b1ant.h30 #define BT_INFO_8723B_1ANT_B_FTP BIT7
Dhalbtc8192e2ant.h30 #define BT_INFO_8192E_2ANT_B_FTP BIT7
Dhalbtc8821a1ant.h32 #define BT_INFO_8821A_1ANT_B_FTP BIT7
Dhalbtcoutsrc.h108 #define ALGO_TRACE_SW BIT7
/linux-4.4.14/drivers/scsi/
Ddc395x.h68 #define BIT7 0x00000080 macro
136 #define DATAOUT BIT7
/linux-4.4.14/drivers/staging/rtl8192e/
Drtl819x_Qos.h25 #define BIT7 0x00000080 macro
Drtllib.h466 #define FC_QOS_BIT BIT7
/linux-4.4.14/include/uapi/linux/
Dsynclink.h25 #define BIT7 0x0080 macro
/linux-4.4.14/drivers/char/pcmcia/
Dsynclink_cs.c298 #define IRQ_RXEOM BIT7 // receive message end
678 #define CMD_RXFIFO BIT7 // release current rx FIFO
927 if (status & (BIT7 + BIT6)) { in rx_ready_async()
928 if (status & BIT7) in rx_ready_async()
939 if (status & BIT7) in rx_ready_async()
1235 if (gis & BIT7) { in mgslpc_isr()
1483 info->read_status_mask |= BIT7 | BIT6; in mgslpc_change_params()
1485 info->ignore_status_mask |= BIT7 | BIT6; in mgslpc_change_params()
3189 val |= BIT7 | BIT6; in hdlc_mode()
3601 if (read_reg(info, CHB + VSTR) & BIT7) in get_signals()
[all …]
/linux-4.4.14/drivers/tty/
Dsynclink.c505 #define RXSTATUS_EXITED_HUNT BIT7
545 #define TXSTATUS_PREAMBLE_SENT BIT7
566 #define MISCSTATUS_DCD_LATCHED BIT7
590 #define SICR_DCD_ACTIVE BIT7
592 #define SICR_DCD (BIT7|BIT6)
626 #define TXSTATUS_PREAMBLE_SENT BIT7
2911 usc_OutReg(info,IOCR,(u16)(usc_InReg(info,IOCR) | BIT7)); in mgsl_break()
2913 usc_OutReg(info,IOCR,(u16)(usc_InReg(info,IOCR) & ~BIT7)); in mgsl_break()
5211 usc_OutReg(info,IOCR,usc_InReg(info,IOCR) | (BIT7 | BIT6)); in usc_enable_loopback()
5250 usc_OutReg(info,IOCR,usc_InReg(info,IOCR) & ~(BIT7 | BIT6)); in usc_enable_loopback()
[all …]
Dsynclink_gt.c420 #define IRQ_DSR BIT7
2891 val |= BIT7; in set_interface()
2893 val &= ~BIT7; in set_interface()
4156 val |= BIT7; in async_mode()
4307 val |= BIT7; in sync_mode()
4424 val |= BIT7; /* 100, txclk = DPLL Input */ in sync_mode()
4447 val = BIT7; break; in sync_mode()
4450 val = BIT7 + BIT6; break; in sync_mode()
4574 val |= BIT7 + BIT6 + BIT5; /* 1110 */ in msc_set_vcr()
Dsynclinkmp.c415 #define TXINTE BIT7
421 #define UDRN BIT7
434 #define EOM BIT7
2600 if (timerstatus0 & (BIT7 | BIT6)) in synclinkmp_interrupt()
2604 if (timerstatus1 & (BIT7 | BIT6)) in synclinkmp_interrupt()
4575 case HDLC_ENCODING_BIPHASE_MARK: RegValue |= BIT7 + BIT5; break; /* aka FM1 */ in hdlc_mode()
4576 case HDLC_ENCODING_BIPHASE_SPACE: RegValue |= BIT7 + BIT6; break; /* aka FM0 */ in hdlc_mode()
4577 case HDLC_ENCODING_BIPHASE_LEVEL: RegValue |= BIT7; break; /* aka Manchester */ in hdlc_mode()
/linux-4.4.14/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
Dreg.h391 #define RRSR_18M BIT7
/linux-4.4.14/drivers/scsi/lpfc/
Dlpfc_hw4.h681 #define LPFC_SLI4_INTR7 BIT7