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Searched refs:BIT3 (Results 1 – 29 of 29) sorted by relevance

/linux-4.4.14/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
Dpwrseq.h57 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0 \
127 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3 \
132 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0 \
198 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3 \
224 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0 \
408 PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0 \
426 PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3), 0 \
497 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3) \
501 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3 \
510 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4 \
[all …]
/linux-4.4.14/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_hw.h140 #define RCR_FILTER_MASK (BIT0 | BIT1 | BIT2 | BIT3 | BIT5 | BIT12 | \
156 #define RCR_AB BIT3
214 #define SCR_RxDecEnable BIT3
235 #define IMR_BEDOK BIT3
244 #define TPPoll_VOQ BIT3
284 #define AcmHw_VoqEn BIT3
374 #define RRSR_11M BIT3
/linux-4.4.14/drivers/scsi/
Ddc395x.h72 #define BIT3 0x00000008 macro
81 #define UNIT_RETRY BIT3
131 #define UNDER_RUN BIT3
176 #define WIDE_NEGO_DONE BIT3
632 #define ACTIVE_NEGATION BIT3
/linux-4.4.14/drivers/video/fbdev/via/
Ddvi.c359 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp0()
384 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
391 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
470 viafb_write_reg_mask(CRD2, VIACR, 0, BIT3); in viafb_dvi_enable()
Dlcd.c434 viafb_write_reg_mask(CRA2, VIACR, 0x08, BIT3); in load_lcd_scaling()
446 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT3); in load_lcd_scaling()
534 BIT0 + BIT1 + BIT2 + BIT3); in lcd_patch_skew()
631 viafb_write_reg_mask(CR6A, VIACR, 0, BIT3); in integrated_lvds_disable()
679 viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3); in integrated_lvds_enable()
773 viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3); in viafb_lcd_enable()
774 viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3); in viafb_lcd_enable()
Dshare.h31 #define BIT3 0x08 macro
Dhw.c972 viafb_write_reg_mask(CR33, VIACR, 0x08, BIT3); in load_fix_bit_crtc_reg()
/linux-4.4.14/drivers/net/wireless/realtek/rtlwifi/btcoexist/
Dhalbt_precomp.h51 #define BIT3 0x00000008 macro
Dhalbtc8723b2ant.h37 #define BT_INFO_8723B_2ANT_B_ACL_BUSY BIT3
Dhalbtc8821a2ant.h34 #define BT_INFO_8821A_2ANT_B_ACL_BUSY BIT3
Dhalbtcoutsrc.h104 #define ALGO_TRACE BIT3
116 #define WIFI_P2P_GO_CONNECTED BIT3
Dhalbtc8723b1ant.h34 #define BT_INFO_8723B_1ANT_B_ACL_BUSY BIT3
Dhalbtc8192e2ant.h34 #define BT_INFO_8192E_2ANT_B_ACL_BUSY BIT3
Dhalbtc8821a1ant.h36 #define BT_INFO_8821A_1ANT_B_ACL_BUSY BIT3
Dhalbtc8821a1ant.c2784 if ((coex_sta->bt_info_ext & BIT3) && !wifi_under_5g) { in ex_halbtc8821a1ant_bt_info_notify()
Dhalbtc8723b1ant.c2974 if (coex_sta->bt_info_ext & BIT3) { in ex_halbtc8723b1ant_bt_info_notify()
Dhalbtc8821a2ant.c3757 if ((coex_sta->bt_info_ext & BIT3)) { in ex_halbtc8821a2ant_bt_info_notify()
Dhalbtc8192e2ant.c3694 if ((coex_sta->bt_info_ext & BIT3)) { in ex_halbtc8192e2ant_bt_info_notify()
Dhalbtc8723b2ant.c3570 if ((coex_sta->bt_info_ext & BIT3)) { in ex_btc8723b2ant_bt_info_notify()
/linux-4.4.14/drivers/staging/rtl8192e/
Drtl819x_Qos.h21 #define BIT3 0x00000008 macro
Drtllib.h117 #define RT_RF_OFF_LEVL_HALT_NIC BIT3
/linux-4.4.14/drivers/char/pcmcia/
Dsynclink_cs.c314 #define PVR_AUTOCTS BIT3
682 #define CMD_TXFIFO BIT3 // release current tx FIFO
1192 if (gis & (BIT3 | BIT2)) in mgslpc_isr()
3111 val |= BIT3; in hdlc_mode()
3120 val |= BIT4 | BIT3; in hdlc_mode()
3251 set_reg_bits(info, CHA + PVR, BIT3); in hdlc_mode()
3253 clear_reg_bits(info, CHA + PVR, BIT3); in hdlc_mode()
3288 clear_reg_bits(info, CHA + MODE, BIT3); in rx_stop()
3305 set_reg_bits(info, CHA + MODE, BIT3); in rx_start()
3521 val |= BIT3; in async_mode()
[all …]
/linux-4.4.14/include/uapi/linux/
Dsynclink.h21 #define BIT3 0x0008 macro
/linux-4.4.14/drivers/tty/
Dsynclink.c493 #define TRANSMIT_STATUS BIT3
510 #define RXSTATUS_CRC_ERROR BIT3
511 #define RXSTATUS_FRAMING_ERROR BIT3
550 #define TXSTATUS_CRC_SENT BIT3
570 #define MISCSTATUS_RCC_UNDERRUN BIT3
596 #define SICR_RCC_UNDERFLOW BIT3
630 #define TXSTATUS_CRC_SENT BIT3
1452 usc_OutReg( info, RICR+LSBONLY, (u16)(usc_InReg(info, RICR+LSBONLY) & ~BIT3 )); in mgsl_isr_receive_data()
1610 if ( status & BIT3 ) { in mgsl_isr_receive_dma()
5050 usc_OutReg(info, SICR, (u16)(usc_InReg(info,SICR) | BIT3)); in usc_set_sdlc_mode()
[all …]
Dsynclinkmp.c425 #define CCTS BIT3
441 #define OVRN BIT3
1531 RegValue |= BIT3; in set_break()
1533 RegValue &= ~BIT3; in set_break()
2585 if (status & BIT3 << shift) in synclinkmp_interrupt()
2594 if (dmastatus & BIT3 << shift) in synclinkmp_interrupt()
4411 case 6: RegValue |= BIT5 + BIT3; break; in async_mode()
4412 case 5: RegValue |= BIT5 + BIT4 + BIT3 + BIT2; break; in async_mode()
4586 RegValue |= BIT3; in hdlc_mode()
4748 if (!(status & BIT3)) in get_signals()
[all …]
Dsynclink_gt.c2008 if (status & BIT3) { in dsr_change()
2253 if (status & (BIT5 + BIT4 + BIT3)) { in isr_tdma()
2742 wr_reg16(info, RCR, rd_reg16(info, RCR) | BIT3); in rx_enable()
4172 val |= BIT3; in async_mode()
4254 val |= BIT3; in async_mode()
4429 val |= BIT3; /* 010, rxclk = BRG */ in sync_mode()
4542 if (status & BIT3) in get_signals()
4584 val |= BIT3; in msc_set_vcr()
4601 val |= BIT3; in set_signals()
4603 val &= ~BIT3; in set_signals()
/linux-4.4.14/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
Dreg.h387 #define RRSR_11M BIT3
522 #define WOW_UWF BIT3 /* Unicast Wakeup frame. */
/linux-4.4.14/drivers/scsi/lpfc/
Dlpfc_hw4.h677 #define LPFC_SLI4_INTR3 BIT3
/linux-4.4.14/drivers/eisa/
Deisa.ids981 ISABB00 "BIT3 403/404/405 Bus Communications Adaptors"