Searched refs:BIT15 (Results 1 – 13 of 13) sorted by relevance
82 #define BIT15 0x00008000 macro127 #define SOF_STATUS BIT15156 #define EP7_INT BIT15183 #define EP7_EN BIT15224 #define EP0_OUT_NAK_INT BIT15241 #define EP0_STATUS_RW_BIT (BIT16|BIT15|BIT11|0xFF)245 #define EP0_OUT_NAK_EN BIT15
190 #define CAM_VALID BIT15223 #define IMR_TXFOVW BIT15256 #define TPPoll_StopHCCA BIT15386 #define RRSR_MCS3 BIT15
126 usConfig |= BIT15 | (KeyType<<2); in rtl92e_set_key()128 usConfig |= BIT15 | (KeyType<<2) | KeyIndex; in rtl92e_set_key()
63 #define BIT15 0x00008000 macro
33 #define BIT15 0x00008000 macro
33 #define BIT15 0x8000 macro
464 #define BIT15 0x8000 macro
558 #define MISCSTATUS_RXC_LATCHED BIT15578 #define SICR_RXC_ACTIVE BIT15580 #define SICR_RXC (BIT15|BIT14)635 #define DICR_MASTER BIT151842 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT15) | BIT14)); in shutdown()4710 RegValue |= BIT15; in usc_set_sdlc_mode()4712 RegValue |= BIT15 | BIT14; in usc_set_sdlc_mode()4754 case HDLC_ENCODING_BIPHASE_MARK: RegValue |= BIT15; break; in usc_set_sdlc_mode()4755 case HDLC_ENCODING_BIPHASE_SPACE: RegValue |= BIT15 | BIT13; break; in usc_set_sdlc_mode()4756 case HDLC_ENCODING_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14; break; in usc_set_sdlc_mode()[all …]
219 #define desc_complete(a) (le16_to_cpu((a).status) & BIT15)2140 set_desc_status(info->rbufs[i], BIT15 | (reg >> 8)); in isr_rxdata()4248 val = BIT15 + BIT14 + BIT0; in async_mode()4300 val |= BIT15 + BIT13; in sync_mode()4303 case MGSL_MODE_BISYNC: val |= BIT15; break; in sync_mode()4375 val |= BIT15 + BIT13; in sync_mode()4378 case MGSL_MODE_BISYNC: val |= BIT15; break; in sync_mode()4484 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0); in sync_mode()
60 #define BIT15 0x00008000 macro
399 #define RRSR_MCS3 BIT15
689 #define LPFC_SLI4_INTR15 BIT15
290 #define IRQ_BREAK_ON BIT15 // rx break detected