/linux-4.4.14/drivers/gpu/drm/nouveau/ |
D | nv50_fbcon.c | 42 BEGIN_NV04(chan, NvSub2D, 0x02ac, 1); in nv50_fbcon_fillrect() 45 BEGIN_NV04(chan, NvSub2D, 0x0588, 1); in nv50_fbcon_fillrect() 51 BEGIN_NV04(chan, NvSub2D, 0x0600, 4); in nv50_fbcon_fillrect() 57 BEGIN_NV04(chan, NvSub2D, 0x02ac, 1); in nv50_fbcon_fillrect() 76 BEGIN_NV04(chan, NvSub2D, 0x0110, 1); in nv50_fbcon_copyarea() 78 BEGIN_NV04(chan, NvSub2D, 0x08b0, 4); in nv50_fbcon_copyarea() 83 BEGIN_NV04(chan, NvSub2D, 0x08d0, 4); in nv50_fbcon_copyarea() 113 BEGIN_NV04(chan, NvSub2D, 0x0814, 2); in nv50_fbcon_imageblit() 122 BEGIN_NV04(chan, NvSub2D, 0x0838, 2); in nv50_fbcon_imageblit() 125 BEGIN_NV04(chan, NvSub2D, 0x0850, 4); in nv50_fbcon_imageblit() [all …]
|
D | nv04_fbcon.c | 41 BEGIN_NV04(chan, NvSubImageBlit, 0x0300, 3); in nv04_fbcon_copyarea() 61 BEGIN_NV04(chan, NvSubGdiRect, 0x02fc, 1); in nv04_fbcon_fillrect() 63 BEGIN_NV04(chan, NvSubGdiRect, 0x03fc, 1); in nv04_fbcon_fillrect() 69 BEGIN_NV04(chan, NvSubGdiRect, 0x0400, 2); in nv04_fbcon_fillrect() 108 BEGIN_NV04(chan, NvSubGdiRect, 0x0be4, 7); in nv04_fbcon_imageblit() 125 BEGIN_NV04(chan, NvSubGdiRect, 0x0c00, iter_len); in nv04_fbcon_imageblit() 211 BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0000, 1); in nv04_fbcon_accel_init() 213 BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0184, 2); in nv04_fbcon_accel_init() 216 BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0300, 4); in nv04_fbcon_accel_init() 222 BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0000, 1); in nv04_fbcon_accel_init() [all …]
|
D | nouveau_bo.c | 815 BEGIN_NV04(chan, NvSubCopy, 0x030c, 8); in nva3_bo_move_copy() 824 BEGIN_NV04(chan, NvSubCopy, 0x0300, 1); in nva3_bo_move_copy() 842 BEGIN_NV04(chan, NvSubCopy, 0x0320, 6); in nv98_bo_move_exec() 860 BEGIN_NV04(chan, NvSubCopy, 0x0304, 6); in nv84_bo_move_exec() 876 BEGIN_NV04(chan, NvSubCopy, 0x0000, 1); in nv50_bo_move_init() 878 BEGIN_NV04(chan, NvSubCopy, 0x0180, 3); in nv50_bo_move_init() 911 BEGIN_NV04(chan, NvSubCopy, 0x0200, 7); in nv50_bo_move_m2mf() 920 BEGIN_NV04(chan, NvSubCopy, 0x0200, 1); in nv50_bo_move_m2mf() 924 BEGIN_NV04(chan, NvSubCopy, 0x021c, 7); in nv50_bo_move_m2mf() 933 BEGIN_NV04(chan, NvSubCopy, 0x021c, 1); in nv50_bo_move_m2mf() [all …]
|
D | nv84_fence.c | 43 BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1); in nv84_fence_emit32() 45 BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 5); in nv84_fence_emit32() 61 BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1); in nv84_fence_sync32() 63 BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); in nv84_fence_sync32()
|
D | nv17_fence.c | 52 BEGIN_NV04(prev, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4); in nv17_fence_sync() 61 BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4); in nv17_fence_sync()
|
D | nouveau_display.c | 692 BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1); in nouveau_page_flip_emit() 783 BEGIN_NV04(chan, NvSubImageBlit, 0x012c, 1); in nouveau_crtc_page_flip() 785 BEGIN_NV04(chan, NvSubImageBlit, 0x0134, 1); in nouveau_crtc_page_flip() 787 BEGIN_NV04(chan, NvSubImageBlit, 0x0100, 1); in nouveau_crtc_page_flip() 789 BEGIN_NV04(chan, NvSubImageBlit, 0x0130, 1); in nouveau_crtc_page_flip()
|
D | nv04_fence.c | 43 BEGIN_NV04(chan, NvSubSw, 0x0150, 1); in nv04_fence_emit()
|
D | nv10_fence.c | 35 BEGIN_NV04(chan, 0, NV10_SUBCHAN_REF_CNT, 1); in nv10_fence_emit()
|
D | nouveau_dma.h | 111 BEGIN_NV04(struct nouveau_channel *chan, int subc, int mthd, int size) in BEGIN_NV04() function
|
D | nv50_display.c | 590 BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 2); in nv50_display_flip_next() 593 BEGIN_NV04(chan, 0, NV11_SUBCHAN_SEMAPHORE_RELEASE, 1); in nv50_display_flip_next() 595 BEGIN_NV04(chan, 0, NV11_SUBCHAN_SEMAPHORE_OFFSET, 2); in nv50_display_flip_next() 605 BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1); in nv50_display_flip_next() 607 BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); in nv50_display_flip_next() 612 BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); in nv50_display_flip_next()
|
D | nouveau_chan.c | 390 BEGIN_NV04(chan, NvSubSw, 0x0000, 1); in nouveau_channel_init()
|
D | nouveau_drm.c | 249 BEGIN_NV04(drm->channel, NvSubSw, 0, 1); in nouveau_accel_init()
|