Searched refs:AR_SREV_9561 (Results 1 – 10 of 10) sorted by relevance
457 #define AR_PHY_SPUR_MASK_A (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x18 : 0x20))458 #define AR_PHY_SPUR_MASK_B (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x1c : 0x24))498 #define AR_PHY_TEST (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x15c : 0x160))509 #define AR_PHY_TEST_CTL_STATUS (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x160 : 0x164))524 #define AR_PHY_TSTDAC (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x164 : 0x168))526 #define AR_PHY_CHAN_STATUS (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x168 : 0x16c))528 #define AR_PHY_CHAN_INFO_MEMORY (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x16c : 0x170))532 #define AR_PHY_CHNINFO_NOISEPWR (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x170 : 0x174))533 #define AR_PHY_CHNINFO_GAINDIFF (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x174 : 0x178))534 #define AR_PHY_CHNINFO_FINETIM (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x178 : 0x17c))[all …]
379 } else if (AR_SREV_9561(ah)) { in ar9003_hw_init_mode_regs()617 else if (AR_SREV_9561(ah)) in ar9003_tx_gain_table_mode0()670 } else if (AR_SREV_9561(ah)) in ar9003_tx_gain_table_mode1()707 else if (AR_SREV_9561(ah)) in ar9003_tx_gain_table_mode2()781 else if (AR_SREV_9561(ah)) in ar9003_tx_gain_table_mode5()855 } else if (AR_SREV_9561(ah)) { in ar9003_rx_gain_table_mode0()917 } else if (AR_SREV_9561(ah)) { in ar9003_rx_gain_table_mode1()
187 AR_SREV_9561(ah)) { in ar9003_hw_set_channel()203 AR_SREV_9531(ah) || AR_SREV_9561(ah)) && in ar9003_hw_set_channel()270 AR_SREV_9550(ah) || AR_SREV_9561(ah)) { in ar9003_hw_spur_mitigate_mrc_cck()297 AR_SREV_9550(ah) || AR_SREV_9561(ah)) in ar9003_hw_spur_mitigate_mrc_cck()648 if (!AR_SREV_9561(ah)) in ar9003_hw_set_channel_regs()753 AR_SREV_9561(ah)) { in ar9003_hw_override_ini()934 if (AR_SREV_9550(ah) || AR_SREV_9561(ah)) in ar9003_hw_process_ini()938 if (AR_SREV_9561(ah) && (ar9003_hw_get_rx_gain_idx(ah) == 0)) in ar9003_hw_process_ini()944 if (AR_SREV_9550(ah) || AR_SREV_9531(ah) || AR_SREV_9561(ah)) { in ar9003_hw_process_ini()950 if (AR_SREV_9561(ah)) in ar9003_hw_process_ini()[all …]
821 AR_SREV_9561(ah)) { in ath9k_hw_init_pll()832 if (AR_SREV_9531(ah) || AR_SREV_9561(ah)) { in ath9k_hw_init_pll()849 AR_SREV_9561(ah)) ? in ath9k_hw_init_pll()856 if (AR_SREV_9531(ah) || AR_SREV_9561(ah)) in ath9k_hw_init_pll()874 else if (AR_SREV_9531(ah) || AR_SREV_9561(ah)) { in ath9k_hw_init_pll()891 if (AR_SREV_9531(ah) || AR_SREV_9561(ah)) in ath9k_hw_init_pll()931 AR_SREV_9561(ah)) in ath9k_hw_init_interrupt_masks()1724 AR_SREV_9561(ah)) in ath9k_hw_init_desc()2515 !AR_SREV_9561(ah) && !AR_SREV_9565(ah)) in ath9k_hw_fill_cap_info()2532 if (AR_SREV_9561(ah)) in ath9k_hw_fill_cap_info()
273 AR_SREV_9565(ah) || AR_SREV_9561(ah)) in ath9k_hw_set_cck_nil()
3539 AR_SREV_9531(ah) || AR_SREV_9561(ah)) in ar9003_hw_xpa_bias_level_apply()3602 } else if (AR_SREV_9550(ah) || AR_SREV_9531(ah) || AR_SREV_9561(ah)) { in ar9003_hw_ant_ctrl_apply()3933 AR_SREV_9561(ah)) { in ar9003_hw_internal_regulator_apply()3937 if (AR_SREV_9561(ah)) in ar9003_hw_internal_regulator_apply()4042 !AR_SREV_9561(ah)) in ar9003_hw_xpa_timing_control_apply()4820 if (AR_SREV_9550(ah) || AR_SREV_9531(ah) || AR_SREV_9561(ah)) { in ar9003_hw_power_control_override()
1253 AR_SREV_9561(ah)) { in ar9003_hw_manual_peak_cal()1645 AR_SREV_9561(ah)) { in ar9003_hw_init_cal_soc()
824 AR_SREV_9561(ah)) in ath9k_hw_enable_interrupts()
424 AR_SREV_9561(sc->sc_ah)) in ath_calcrxfilter()
983 #define AR_SREV_9561(_ah) \ macro