Searched refs:ARM_SMMU_GR0_S2CR (Results 1 – 1 of 1) sorted by relevance
161 #define ARM_SMMU_GR0_S2CR(n) (0xc00 + ((n) << 2)) macro1080 writel_relaxed(s2cr, gr0_base + ARM_SMMU_GR0_S2CR(idx)); in arm_smmu_domain_add_master()1105 gr0_base + ARM_SMMU_GR0_S2CR(idx)); in arm_smmu_domain_remove_master()1471 gr0_base + ARM_SMMU_GR0_S2CR(i)); in arm_smmu_device_reset()