Searched refs:APMU_SDH1 (Results 1 - 7 of 7) sorted by relevance
| /linux-4.4.14/drivers/clk/mmp/ |
| H A D | clk-of-pxa168.c | 44 #define APMU_SDH1 0x58 macro
191 {0, "sdh1_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH1, 6, 1, 0, &sdh1_lock},
207 {PXA168_CLK_SDH1, "sdh1_clk", "sdh1_mux", CLK_SET_RATE_PARENT, APMU_SDH1, 0x1b, 0x1b, 0x0, 0, &sdh1_lock},
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| H A D | clk-of-pxa910.c | 43 #define APMU_SDH1 0x58 macro
197 {0, "sdh1_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH1, 6, 1, 0, &sdh1_lock},
213 {PXA910_CLK_SDH1, "sdh1_clk", "sdh1_mux", CLK_SET_RATE_PARENT, APMU_SDH1, 0x1b, 0x1b, 0x0, 0, &sdh1_lock},
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| H A D | clk-pxa168.c | 42 #define APMU_SDH1 0x58 macro
302 apmu_base + APMU_SDH1, 6, 1, 0, &clk_lock); pxa168_clk_init()
305 clk = mmp_clk_register_apmu("sdh1", "sdh1_mux", apmu_base + APMU_SDH1, pxa168_clk_init()
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| H A D | clk-pxa910.c | 40 #define APMU_SDH1 0x58 macro
277 apmu_base + APMU_SDH1, 6, 1, 0, &clk_lock); pxa910_clk_init()
281 apmu_base + APMU_SDH1, 0x1b, &clk_lock); pxa910_clk_init()
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| H A D | clk-mmp2.c | 46 #define APMU_SDH1 0x58 macro
348 clk = mmp_clk_register_apmu("sdh1", "sdh_div", apmu_base + APMU_SDH1, mmp2_clk_init()
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| H A D | clk-of-mmp2.c | 48 #define APMU_SDH1 0x58 macro
229 {MMP2_CLK_SDH1, "sdh1_clk", "sdh_mix_clk", CLK_SET_RATE_PARENT, APMU_SDH1, 0x1b, 0x1b, 0x0, 0, &sdh_lock},
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| /linux-4.4.14/arch/arm/mach-mmp/ |
| H A D | clock-mmp2.c | 43 #define APMU_SDH1 APMU_REG(0x058) macro
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