Searched refs:APBC_SSP2 (Results 1 - 9 of 9) sorted by relevance

/linux-4.4.14/arch/arm/mach-mmp/
H A Dclock-pxa910.c24 #define APBC_SSP2 APBC_REG(0x020) macro
H A Dclock-pxa168.c29 #define APBC_SSP2 APBC_REG(0x820) macro
H A Dclock-mmp2.c32 #define APBC_SSP2 APBC_REG(0x054) macro
/linux-4.4.14/drivers/clk/mmp/
H A Dclk-of-pxa168.c38 #define APBC_SSP2 0x84c macro
136 {0, "ssp2_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP2, 4, 3, 0, &ssp2_lock},
158 {PXA168_CLK_SSP2, "ssp2_clk", "ssp2_mux", CLK_SET_RATE_PARENT, APBC_SSP2, 0x3, 0x3, 0x0, 0, &ssp2_lock},
H A Dclk-pxa168.c36 #define APBC_SSP2 0x84c macro
258 apbc_base + APBC_SSP2, 4, 3, 0, &clk_lock); pxa168_clk_init()
261 clk = mmp_clk_register_apbc("ssp2", "ssp1_mux", apbc_base + APBC_SSP2, pxa168_clk_init()
H A Dclk-mmp2.c43 #define APBC_SSP2 0x58 macro
316 apbc_base + APBC_SSP2, 4, 3, 0, &clk_lock); mmp2_clk_init()
320 apbc_base + APBC_SSP2, 10, 0, &clk_lock); mmp2_clk_init()
H A Dclk-of-mmp2.c45 #define APBC_SSP2 0x58 macro
148 {0, "ssp2_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP2, 4, 3, 0, &ssp2_lock},
174 {MMP2_CLK_SSP2, "ssp2_clk", "ssp2_mux", CLK_SET_RATE_PARENT, APBC_SSP2, 0x7, 0x3, 0x0, 0, &ssp2_lock},
H A Dclk-of-pxa910.c37 #define APBC_SSP2 0x4c macro
H A Dclk-pxa910.c36 #define APBC_SSP2 0x4c macro

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