Searched refs:APBC_SSP0 (Results 1 – 7 of 7) sorted by relevance
| /linux-4.4.14/drivers/clk/mmp/ |
| D | clk-of-pxa168.c | 36 #define APBC_SSP0 0x81c macro
134 …{0, "ssp0_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP0, 4,…
156 …{PXA168_CLK_SSP0, "ssp0_clk", "ssp0_mux", CLK_SET_RATE_PARENT, APBC_SSP0, 0x3, 0x3, 0x0, 0, &ssp0_…
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| D | clk-pxa910.c | 34 #define APBC_SSP0 0x1c macro
243 apbc_base + APBC_SSP0, 4, 3, 0, &clk_lock); in pxa910_clk_init()
247 apbc_base + APBC_SSP0, 10, 0, &clk_lock); in pxa910_clk_init()
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| D | clk-of-pxa910.c | 35 #define APBC_SSP0 0x1c macro
131 …{0, "ssp0_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP0, 4,…
153 …{PXA910_CLK_SSP0, "ssp0_clk", "ssp0_mux", CLK_SET_RATE_PARENT, APBC_SSP0, 0x3, 0x3, 0x0, 0, &ssp0_…
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| D | clk-of-mmp2.c | 43 #define APBC_SSP0 0x50 macro
146 …{0, "ssp0_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP0, 4,…
172 …{MMP2_CLK_SSP0, "ssp0_clk", "ssp0_mux", CLK_SET_RATE_PARENT, APBC_SSP0, 0x7, 0x3, 0x0, 0, &ssp0_lo…
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| D | clk-pxa168.c | 34 #define APBC_SSP0 0x81c macro
238 apbc_base + APBC_SSP0, 4, 3, 0, &clk_lock); in pxa168_clk_init()
241 clk = mmp_clk_register_apbc("ssp0", "ssp0_mux", apbc_base + APBC_SSP0, in pxa168_clk_init()
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| D | clk-mmp2.c | 41 #define APBC_SSP0 0x50 macro
296 apbc_base + APBC_SSP0, 4, 3, 0, &clk_lock); in mmp2_clk_init()
300 apbc_base + APBC_SSP0, 10, 0, &clk_lock); in mmp2_clk_init()
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| /linux-4.4.14/arch/arm/mach-mmp/ |
| D | clock-mmp2.c | 30 #define APBC_SSP0 APBC_REG(0x04c) macro
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