Searched refs:APBC_PWM2 (Results 1 - 9 of 9) sorted by relevance
| /linux-4.4.14/arch/arm/mach-mmp/ |
| H A D | clock-pxa910.c | 20 #define APBC_PWM2 APBC_REG(0x010) macro
|
| H A D | clock-pxa168.c | 20 #define APBC_PWM2 APBC_REG(0x010) macro
|
| H A D | clock-mmp2.c | 28 #define APBC_PWM2 APBC_REG(0x044) macro
|
| /linux-4.4.14/drivers/clk/mmp/ |
| H A D | clk-of-pxa168.c | 33 #define APBC_PWM2 0x14 macro
150 {PXA168_CLK_PWM2, "pwm2_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM2, 0x3, 0x3, 0x0, 0, &reset_lock},
|
| H A D | clk-of-pxa910.c | 33 #define APBC_PWM2 0x14 macro
148 {PXA910_CLK_PWM2, "pwm2_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM2, 0x3, 0x3, 0x0, 0, &reset_lock},
|
| H A D | clk-pxa168.c | 32 #define APBC_PWM2 0x14 macro
195 apbc_base + APBC_PWM2, 10, 0, &clk_lock); pxa168_clk_init()
|
| H A D | clk-pxa910.c | 32 #define APBC_PWM2 0x14 macro
200 apbc_base + APBC_PWM2, 10, 0, &clk_lock); pxa910_clk_init()
|
| H A D | clk-mmp2.c | 39 #define APBC_PWM2 0x44 macro
242 apbc_base + APBC_PWM2, 10, 0, &clk_lock); mmp2_clk_init()
|
| H A D | clk-of-mmp2.c | 41 #define APBC_PWM2 0x44 macro
165 {MMP2_CLK_PWM2, "pwm2_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM2, 0x7, 0x3, 0x0, 0, &reset_lock},
|
Completed in 158 milliseconds