Searched refs:AMDGPU_MAX_RINGS (Results 1 – 11 of 11) sorted by relevance
63 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_sa_bo_manager_init()231 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_sa_event()268 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_sa_bo_next_hole()318 struct fence *fences[AMDGPU_MAX_RINGS]; in amdgpu_sa_bo_new()319 unsigned tries[AMDGPU_MAX_RINGS]; in amdgpu_sa_bo_new()338 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_sa_bo_new()355 for (i = 0, count = 0; i < AMDGPU_MAX_RINGS; ++i) in amdgpu_sa_bo_new()
413 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_fence_note_sync()478 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) in amdgpu_fence_driver_init_ring()556 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_fini()589 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_suspend()625 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_resume()649 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_force_completion()786 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_debugfs_fence_info()799 for (j = 0; j < AMDGPU_MAX_RINGS; ++j) { in amdgpu_debugfs_fence_info()
54 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) in amdgpu_sync_create()256 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_sync_wait()285 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_sync_rings()384 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) in amdgpu_sync_free()
38 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) in amdgpu_ctx_init()75 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) in amdgpu_ctx_fini()
1397 adev->fence_context = fence_context_alloc(AMDGPU_MAX_RINGS); in amdgpu_device_init()1816 unsigned ring_sizes[AMDGPU_MAX_RINGS]; in amdgpu_gpu_reset()1817 uint32_t *ring_data[AMDGPU_MAX_RINGS]; in amdgpu_gpu_reset()1831 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_gpu_reset()1852 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_gpu_reset()1873 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_gpu_reset()
46 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) in amdgpu_do_test_moves()505 for (i = 1; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_test_syncing()
293 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_ib_ring_tests()
99 #define AMDGPU_MAX_RINGS 16 macro395 uint64_t sync_seq[AMDGPU_MAX_RINGS];598 struct list_head flist[AMDGPU_MAX_RINGS];663 struct fence *sync_to[AMDGPU_MAX_RINGS];954 struct amdgpu_vm_id ids[AMDGPU_MAX_RINGS];1038 struct amdgpu_ctx_ring rings[AMDGPU_MAX_RINGS];2055 struct amdgpu_ring *rings[AMDGPU_MAX_RINGS];
138 struct fence *best[AMDGPU_MAX_RINGS] = {}; in amdgpu_vm_grab_id()1254 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_vm_init()1333 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_vm_fini()
312 if (adev->num_rings >= AMDGPU_MAX_RINGS) in amdgpu_ring_init()
600 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_dpm_change_power_state_locked()