| H A D | zr36050.c | 93 zr36050_write (struct zr36050 *ptr, zr36050_write() function
175 zr36050_write(ptr, ZR050_SOF_IDX, 0x00); zr36050_basic_test()
176 zr36050_write(ptr, ZR050_SOF_IDX + 1, 0x00); zr36050_basic_test()
185 zr36050_write(ptr, ZR050_SOF_IDX, 0xff); zr36050_basic_test()
186 zr36050_write(ptr, ZR050_SOF_IDX + 1, 0xc0); zr36050_basic_test()
225 zr36050_write(ptr, startreg++, data[i++]); zr36050_pushit()
438 zr36050_write(ptr, ZR050_HARDWARE, ZR050_HW_MSTR); zr36050_init()
441 zr36050_write(ptr, ZR050_MODE, zr36050_init()
443 zr36050_write(ptr, ZR050_OPTIONS, 0); zr36050_init()
446 zr36050_write(ptr, ZR050_INT_REQ_0, 0); zr36050_init()
447 zr36050_write(ptr, ZR050_INT_REQ_1, 3); // low 2 bits always 1 zr36050_init()
450 /*zr36050_write(ptr, ZR050_MBCV, ptr->max_block_vol);*/ zr36050_init()
451 zr36050_write(ptr, ZR050_SF_HI, ptr->scalefact >> 8); zr36050_init()
452 zr36050_write(ptr, ZR050_SF_LO, ptr->scalefact & 0xff); zr36050_init()
454 zr36050_write(ptr, ZR050_AF_HI, 0xff); zr36050_init()
455 zr36050_write(ptr, ZR050_AF_M, 0xff); zr36050_init()
456 zr36050_write(ptr, ZR050_AF_LO, 0xff); zr36050_init()
470 zr36050_write(ptr, ZR050_APP_IDX, 0xff); zr36050_init()
471 zr36050_write(ptr, ZR050_APP_IDX + 1, 0xe0 + ptr->app.appn); zr36050_init()
472 zr36050_write(ptr, ZR050_APP_IDX + 2, 0x00); zr36050_init()
473 zr36050_write(ptr, ZR050_APP_IDX + 3, ptr->app.len + 2); zr36050_init()
476 zr36050_write(ptr, ZR050_COM_IDX, 0xff); zr36050_init()
477 zr36050_write(ptr, ZR050_COM_IDX + 1, 0xfe); zr36050_init()
478 zr36050_write(ptr, ZR050_COM_IDX + 2, 0x00); zr36050_init()
479 zr36050_write(ptr, ZR050_COM_IDX + 3, ptr->com.len + 2); zr36050_init()
484 zr36050_write(ptr, ZR050_MARKERS_EN, ZR050_ME_DHTI); zr36050_init()
486 zr36050_write(ptr, ZR050_GO, 1); // launch codec zr36050_init()
507 zr36050_write(ptr, ZR050_TCV_NET_HI, tmp >> 8); zr36050_init()
508 zr36050_write(ptr, ZR050_TCV_NET_MH, tmp & 0xff); zr36050_init()
510 zr36050_write(ptr, ZR050_TCV_NET_ML, tmp >> 8); zr36050_init()
511 zr36050_write(ptr, ZR050_TCV_NET_LO, tmp & 0xff); zr36050_init()
519 zr36050_write(ptr, ZR050_TCV_DATA_HI, tmp >> 8); zr36050_init()
520 zr36050_write(ptr, ZR050_TCV_DATA_MH, tmp & 0xff); zr36050_init()
522 zr36050_write(ptr, ZR050_TCV_DATA_ML, tmp >> 8); zr36050_init()
523 zr36050_write(ptr, ZR050_TCV_DATA_LO, tmp & 0xff); zr36050_init()
526 zr36050_write(ptr, ZR050_MODE, zr36050_init()
531 zr36050_write(ptr, ZR050_MARKERS_EN, zr36050_init()
539 zr36050_write(ptr, ZR050_HARDWARE, zr36050_init()
543 zr36050_write(ptr, ZR050_MODE, ZR050_MO_TLM); zr36050_init()
546 zr36050_write(ptr, ZR050_INT_REQ_0, 0); zr36050_init()
547 zr36050_write(ptr, ZR050_INT_REQ_1, 3); // low 2 bits always 1 zr36050_init()
554 zr36050_write(ptr, ZR050_MARKERS_EN, ZR050_ME_DHTI); zr36050_init()
556 zr36050_write(ptr, ZR050_GO, 1); // launch codec zr36050_init()
568 zr36050_write(ptr, ZR050_MODE, 0); zr36050_init()
569 zr36050_write(ptr, ZR050_MARKERS_EN, 0); zr36050_init()
638 zr36050_write(ptr, ZR050_MBCV, ptr->max_block_vol); zr36050_set_video()
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