Searched refs:xvip (Results 1 - 4 of 4) sorted by relevance

/linux-4.1.27/drivers/media/platform/xilinx/
H A Dxilinx-vip.h138 static inline u32 xvip_read(struct xvip_device *xvip, u32 addr) xvip_read() argument
140 return ioread32(xvip->iomem + addr); xvip_read()
143 static inline void xvip_write(struct xvip_device *xvip, u32 addr, u32 value) xvip_write() argument
145 iowrite32(value, xvip->iomem + addr); xvip_write()
148 static inline void xvip_clr(struct xvip_device *xvip, u32 addr, u32 clr) xvip_clr() argument
150 xvip_write(xvip, addr, xvip_read(xvip, addr) & ~clr); xvip_clr()
153 static inline void xvip_set(struct xvip_device *xvip, u32 addr, u32 set) xvip_set() argument
155 xvip_write(xvip, addr, xvip_read(xvip, addr) | set); xvip_set()
158 void xvip_clr_or_set(struct xvip_device *xvip, u32 addr, u32 mask, bool set);
159 void xvip_clr_and_set(struct xvip_device *xvip, u32 addr, u32 clr, u32 set);
161 int xvip_init_resources(struct xvip_device *xvip);
162 void xvip_cleanup_resources(struct xvip_device *xvip);
164 static inline void xvip_reset(struct xvip_device *xvip) xvip_reset() argument
166 xvip_write(xvip, XVIP_CTRL_CONTROL, XVIP_CTRL_CONTROL_SW_RESET); xvip_reset()
169 static inline void xvip_start(struct xvip_device *xvip) xvip_start() argument
171 xvip_set(xvip, XVIP_CTRL_CONTROL, xvip_start()
175 static inline void xvip_stop(struct xvip_device *xvip) xvip_stop() argument
177 xvip_clr(xvip, XVIP_CTRL_CONTROL, XVIP_CTRL_CONTROL_SW_ENABLE); xvip_stop()
180 static inline void xvip_resume(struct xvip_device *xvip) xvip_resume() argument
182 xvip_write(xvip, XVIP_CTRL_CONTROL, xvip_resume()
183 xvip->saved_ctrl | XVIP_CTRL_CONTROL_SW_ENABLE); xvip_resume()
186 static inline void xvip_suspend(struct xvip_device *xvip) xvip_suspend() argument
188 xvip->saved_ctrl = xvip_read(xvip, XVIP_CTRL_CONTROL); xvip_suspend()
189 xvip_write(xvip, XVIP_CTRL_CONTROL, xvip_suspend()
190 xvip->saved_ctrl & ~XVIP_CTRL_CONTROL_SW_ENABLE); xvip_suspend()
193 static inline void xvip_set_frame_size(struct xvip_device *xvip, xvip_set_frame_size() argument
196 xvip_write(xvip, XVIP_ACTIVE_SIZE, xvip_set_frame_size()
201 static inline void xvip_get_frame_size(struct xvip_device *xvip, xvip_get_frame_size() argument
206 reg = xvip_read(xvip, XVIP_ACTIVE_SIZE); xvip_get_frame_size()
213 static inline void xvip_enable_reg_update(struct xvip_device *xvip) xvip_enable_reg_update() argument
215 xvip_set(xvip, XVIP_CTRL_CONTROL, XVIP_CTRL_CONTROL_REG_UPDATE); xvip_enable_reg_update()
218 static inline void xvip_disable_reg_update(struct xvip_device *xvip) xvip_disable_reg_update() argument
220 xvip_clr(xvip, XVIP_CTRL_CONTROL, XVIP_CTRL_CONTROL_REG_UPDATE); xvip_disable_reg_update()
223 static inline void xvip_print_version(struct xvip_device *xvip) xvip_print_version() argument
227 version = xvip_read(xvip, XVIP_CTRL_VERSION); xvip_print_version()
229 dev_info(xvip->dev, "device found, version %u.%02x%x\n", xvip_print_version()
H A Dxilinx-vip.c162 * @xvip: Xilinx Video IP device
177 void xvip_clr_or_set(struct xvip_device *xvip, u32 addr, u32 mask, bool set) xvip_clr_or_set() argument
181 reg = xvip_read(xvip, addr); xvip_clr_or_set()
183 xvip_write(xvip, addr, reg); xvip_clr_or_set()
189 * @xvip: Xilinx Video IP device
197 void xvip_clr_and_set(struct xvip_device *xvip, u32 addr, u32 clr, u32 set) xvip_clr_and_set() argument
201 reg = xvip_read(xvip, addr); xvip_clr_and_set()
204 xvip_write(xvip, addr, reg); xvip_clr_and_set()
208 int xvip_init_resources(struct xvip_device *xvip) xvip_init_resources() argument
210 struct platform_device *pdev = to_platform_device(xvip->dev); xvip_init_resources()
214 xvip->iomem = devm_ioremap_resource(xvip->dev, res); xvip_init_resources()
215 if (IS_ERR(xvip->iomem)) xvip_init_resources()
216 return PTR_ERR(xvip->iomem); xvip_init_resources()
218 xvip->clk = devm_clk_get(xvip->dev, NULL); xvip_init_resources()
219 if (IS_ERR(xvip->clk)) xvip_init_resources()
220 return PTR_ERR(xvip->clk); xvip_init_resources()
222 clk_prepare_enable(xvip->clk); xvip_init_resources()
227 void xvip_cleanup_resources(struct xvip_device *xvip) xvip_cleanup_resources() argument
229 clk_disable_unprepare(xvip->clk); xvip_cleanup_resources()
H A Dxilinx-tpg.c75 * @xvip: Xilinx Video IP device
92 struct xvip_device xvip; member in struct:xtpg_device
115 return container_of(subdev, struct xtpg_device, xvip.subdev); to_tpg()
179 xvip_stop(&xtpg->xvip); xtpg_s_stream()
188 xvip_set_frame_size(&xtpg->xvip, &xtpg->formats[0]); xtpg_s_stream()
221 xvip_clr_and_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, xtpg_s_stream()
241 xvip_write(&xtpg->xvip, XTPG_BAYER_PHASE, bayer_phase); xtpg_s_stream()
246 xvip_start(&xtpg->xvip); xtpg_s_stream()
262 return v4l2_subdev_get_try_format(&xtpg->xvip.subdev, cfg, pad); __xtpg_get_pad_format()
380 xvip_clr_and_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, xtpg_s_ctrl()
384 xvip_clr_or_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, xtpg_s_ctrl()
388 xvip_clr_or_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, xtpg_s_ctrl()
392 xvip_clr_and_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, xtpg_s_ctrl()
398 xvip_clr_or_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, xtpg_s_ctrl()
402 xvip_clr_or_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, xtpg_s_ctrl()
406 xvip_clr_or_set(&xtpg->xvip, XTPG_PATTERN_CONTROL, xtpg_s_ctrl()
410 xvip_write(&xtpg->xvip, XTPG_MOTION_SPEED, ctrl->val); xtpg_s_ctrl()
413 xvip_clr_and_set(&xtpg->xvip, XTPG_CROSS_HAIRS, xtpg_s_ctrl()
418 xvip_clr_and_set(&xtpg->xvip, XTPG_CROSS_HAIRS, xtpg_s_ctrl()
423 xvip_clr_and_set(&xtpg->xvip, XTPG_ZPLATE_HOR_CONTROL, xtpg_s_ctrl()
428 xvip_clr_and_set(&xtpg->xvip, XTPG_ZPLATE_HOR_CONTROL, xtpg_s_ctrl()
433 xvip_clr_and_set(&xtpg->xvip, XTPG_ZPLATE_VER_CONTROL, xtpg_s_ctrl()
438 xvip_clr_and_set(&xtpg->xvip, XTPG_ZPLATE_VER_CONTROL, xtpg_s_ctrl()
443 xvip_write(&xtpg->xvip, XTPG_BOX_SIZE, ctrl->val); xtpg_s_ctrl()
446 xvip_write(&xtpg->xvip, XTPG_BOX_COLOR, ctrl->val); xtpg_s_ctrl()
449 xvip_write(&xtpg->xvip, XTPG_STUCK_PIXEL_THRESH, ctrl->val); xtpg_s_ctrl()
452 xvip_write(&xtpg->xvip, XTPG_NOISE_GAIN, ctrl->val); xtpg_s_ctrl()
693 xvip_suspend(&xtpg->xvip); xtpg_pm_suspend()
702 xvip_resume(&xtpg->xvip); xtpg_pm_resume()
713 struct device *dev = xtpg->xvip.dev; xtpg_parse_of()
714 struct device_node *node = xtpg->xvip.dev->of_node; xtpg_parse_of()
779 xtpg->xvip.dev = &pdev->dev; xtpg_probe()
785 ret = xvip_init_resources(&xtpg->xvip); xtpg_probe()
803 xvip_reset(&xtpg->xvip); xtpg_probe()
819 xvip_get_frame_size(&xtpg->xvip, &xtpg->default_format); xtpg_probe()
830 subdev = &xtpg->xvip.subdev; xtpg_probe()
876 xvip_print_version(&xtpg->xvip); xtpg_probe()
891 xvip_cleanup_resources(&xtpg->xvip); xtpg_probe()
898 struct v4l2_subdev *subdev = &xtpg->xvip.subdev; xtpg_remove()
904 xvip_cleanup_resources(&xtpg->xvip); xtpg_remove()
H A Dxilinx-vtc.c149 * @xvip: Xilinx Video IP device
156 struct xvip_device xvip; member in struct:xvtc_device
170 xvip_write(&xvtc->xvip, XVTC_GENERATOR_OFFSET + addr, value); xvtc_gen_write()
185 ret = clk_prepare_enable(xvtc->xvip.clk); xvtc_generator_start()
223 xvip_write(&xvtc->xvip, XVIP_CTRL_CONTROL, xvtc_generator_start()
246 xvip_write(&xvtc->xvip, XVIP_CTRL_CONTROL, 0); xvtc_generator_stop()
248 clk_disable_unprepare(xvtc->xvip.clk); xvtc_generator_stop()
269 if (xvtc->xvip.dev->of_node == xvtc_node) { xvtc_of_get()
314 struct device_node *node = xvtc->xvip.dev->of_node; xvtc_parse_of()
331 xvtc->xvip.dev = &pdev->dev; xvtc_probe()
337 ret = xvip_init_resources(&xvtc->xvip); xvtc_probe()
343 xvip_print_version(&xvtc->xvip); xvtc_probe()
356 xvip_cleanup_resources(&xvtc->xvip); xvtc_remove()

Completed in 102 milliseconds