Searched refs:vCG_SPLL_FUNC_CNTL_3 (Results 1 - 9 of 9) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/radeon/
H A Drv730_dpm.c112 sclk->vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); rv730_populate_sclk_value()
307 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); rv730_populate_smc_acpi_state()
349 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = rv730_populate_smc_initial_state()
H A Drv770_smc.h38 uint32_t vCG_SPLL_FUNC_CNTL_3; member in struct:RV770_SMC_SCLK_VALUE
H A Drv740_dpm.c180 sclk->vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); rv740_populate_sclk_value()
385 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); rv740_populate_smc_acpi_state()
H A Dnislands_smc.h60 uint32_t vCG_SPLL_FUNC_CNTL_3; member in struct:NISLANDS_SMC_SCLK_VALUE
H A Dsislands_smc.h107 uint32_t vCG_SPLL_FUNC_CNTL_3; member in struct:SISLANDS_SMC_SCLK_VALUE
H A Drv770_dpm.c559 sclk->vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); rv770_populate_sclk_value()
994 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); rv770_populate_smc_acpi_state()
1056 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = rv770_populate_smc_initial_state()
H A Dcypress_dpm.c1268 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cypress_populate_smc_initial_state()
1451 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cypress_populate_smc_acpi_state()
H A Dni_dpm.c1715 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = ni_populate_smc_initial_state()
1916 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); ni_populate_smc_acpi_state()
2061 sclk->vCG_SPLL_FUNC_CNTL_3 = spll_func_cntl_3; ni_calculate_sclk_params()
2081 sclk->vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(sclk_tmp.vCG_SPLL_FUNC_CNTL_3); ni_populate_sclk_value()
2117 fb_div = (sclk_params.vCG_SPLL_FUNC_CNTL_3 & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; ni_init_smc_spll_table()
H A Dsi_dpm.c2869 fb_div = (sclk_params.vCG_SPLL_FUNC_CNTL_3 & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; si_init_smc_spll_table()
4341 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = si_populate_smc_initial_state()
4540 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = si_populate_smc_acpi_state()
4782 sclk->vCG_SPLL_FUNC_CNTL_3 = spll_func_cntl_3; si_calculate_sclk_params()
4802 sclk->vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(sclk_tmp.vCG_SPLL_FUNC_CNTL_3); si_populate_sclk_value()

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