Searched refs:training_lane (Results 1 - 3 of 3) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/exynos/
H A Dexynos_dp_core.h144 u8 training_lane[4]; member in struct:link_train
232 u32 training_lane);
234 u32 training_lane);
236 u32 training_lane);
238 u32 training_lane);
H A Dexynos_dp_core.c471 u8 voltage_swing, pre_emphasis, training_lane; exynos_dp_get_adjust_training_lane() local
479 training_lane = DPCD_VOLTAGE_SWING_SET(voltage_swing) | exynos_dp_get_adjust_training_lane()
483 training_lane |= DP_TRAIN_MAX_SWING_REACHED; exynos_dp_get_adjust_training_lane()
485 training_lane |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; exynos_dp_get_adjust_training_lane()
487 dp->link_train.training_lane[lane] = training_lane; exynos_dp_get_adjust_training_lane()
494 u8 voltage_swing, pre_emphasis, training_lane; exynos_dp_process_clock_recovery() local
526 training_lane = exynos_dp_get_lane_link_training( exynos_dp_process_clock_recovery()
533 if (DPCD_VOLTAGE_SWING_GET(training_lane) == exynos_dp_process_clock_recovery()
535 DPCD_PRE_EMPHASIS_GET(training_lane) == exynos_dp_process_clock_recovery()
555 dp->link_train.training_lane[lane], lane); exynos_dp_process_clock_recovery()
559 dp->link_train.training_lane); exynos_dp_process_clock_recovery()
632 dp->link_train.training_lane[lane], lane); exynos_dp_process_equalizer_training()
635 lane_count, dp->link_train.training_lane); exynos_dp_process_equalizer_training()
H A Dexynos_dp_reg.c977 u32 training_lane) exynos_dp_set_lane0_link_training()
981 reg = training_lane; exynos_dp_set_lane0_link_training()
986 u32 training_lane) exynos_dp_set_lane1_link_training()
990 reg = training_lane; exynos_dp_set_lane1_link_training()
995 u32 training_lane) exynos_dp_set_lane2_link_training()
999 reg = training_lane; exynos_dp_set_lane2_link_training()
1004 u32 training_lane) exynos_dp_set_lane3_link_training()
1008 reg = training_lane; exynos_dp_set_lane3_link_training()
976 exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp, u32 training_lane) exynos_dp_set_lane0_link_training() argument
985 exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp, u32 training_lane) exynos_dp_set_lane1_link_training() argument
994 exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp, u32 training_lane) exynos_dp_set_lane2_link_training() argument
1003 exynos_dp_set_lane3_link_training(struct exynos_dp_device *dp, u32 training_lane) exynos_dp_set_lane3_link_training() argument

Completed in 116 milliseconds