Searched refs:tim1 (Results 1 – 4 of 4) sorted by relevance
437 u32 tim1 = 0, val = 0; in get_sdram_tim_1_shdw() local440 tim1 |= val << T_WTR_SHIFT; in get_sdram_tim_1_shdw()446 tim1 |= (val - 1) << T_RRD_SHIFT; in get_sdram_tim_1_shdw()449 tim1 |= val << T_RC_SHIFT; in get_sdram_tim_1_shdw()452 tim1 |= (val - 1) << T_RAS_SHIFT; in get_sdram_tim_1_shdw()455 tim1 |= val << T_WR_SHIFT; in get_sdram_tim_1_shdw()458 tim1 |= val << T_RCD_SHIFT; in get_sdram_tim_1_shdw()461 tim1 |= val << T_RP_SHIFT; in get_sdram_tim_1_shdw()463 return tim1; in get_sdram_tim_1_shdw()470 u32 tim1 = 0, val = 0; in get_sdram_tim_1_shdw_derated() local[all …]
112 u32 tim1; member210 regs->tim1 = val; in clcdfb_decode()
550 unsigned int *tim1, unsigned int *tim2, in pci9118_calc_divisors() argument559 *div2 = *tim1 / pacer->osc_base; /* scan timer */ in pci9118_calc_divisors()572 *tim1 = *div1 * *div2 * pacer->osc_base; in pci9118_calc_divisors()
303 writel(regs.tim1, fb->regs + CLCD_TIM1); in clcdfb_set_par()