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Searched refs:tiling_mode (Results 1 – 13 of 13) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/i915/
Di915_gem_tiling.c232 i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) in i915_tiling_ok() argument
237 if (tiling_mode == I915_TILING_NONE) in i915_tiling_ok()
241 (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev))) in i915_tiling_ok()
287 i915_gem_object_fence_ok(struct drm_i915_gem_object *obj, int tiling_mode) in i915_gem_object_fence_ok() argument
291 if (tiling_mode == I915_TILING_NONE) in i915_gem_object_fence_ok()
305 size = i915_gem_get_gtt_size(obj->base.dev, obj->base.size, tiling_mode); in i915_gem_object_fence_ok()
333 args->stride, obj->base.size, args->tiling_mode)) { in i915_gem_set_tiling()
344 if (args->tiling_mode == I915_TILING_NONE) { in i915_gem_set_tiling()
348 if (args->tiling_mode == I915_TILING_X) in i915_gem_set_tiling()
367 args->tiling_mode = I915_TILING_NONE; in i915_gem_set_tiling()
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Dintel_sprite.c423 if (obj->tiling_mode != I915_TILING_NONE) in vlv_update_plane()
438 obj->tiling_mode, in vlv_update_plane()
468 if (obj->tiling_mode != I915_TILING_NONE) in vlv_update_plane()
556 if (obj->tiling_mode != I915_TILING_NONE) in ivb_update_plane()
582 intel_gen4_compute_page_offset(&x, &y, obj->tiling_mode, in ivb_update_plane()
618 else if (obj->tiling_mode != I915_TILING_NONE) in ivb_update_plane()
704 if (obj->tiling_mode != I915_TILING_NONE) in ilk_update_plane()
726 intel_gen4_compute_page_offset(&x, &y, obj->tiling_mode, in ilk_update_plane()
754 if (obj->tiling_mode != I915_TILING_NONE) in ilk_update_plane()
Di915_gem.c71 if (obj->tiling_mode) in i915_gem_object_fence_lost()
1104 if (obj->tiling_mode == I915_TILING_NONE && in i915_gem_pwrite_ioctl()
1772 i915_gem_get_gtt_size(struct drm_device *dev, uint32_t size, int tiling_mode) in i915_gem_get_gtt_size() argument
1777 tiling_mode == I915_TILING_NONE) in i915_gem_get_gtt_size()
1801 int tiling_mode, bool fenced) in i915_gem_get_gtt_alignment() argument
1808 tiling_mode == I915_TILING_NONE) in i915_gem_get_gtt_alignment()
1815 return i915_gem_get_gtt_size(dev, size, tiling_mode); in i915_gem_get_gtt_alignment()
2125 if (obj->tiling_mode != I915_TILING_NONE && in i915_gem_object_get_pages_gtt()
2625 reg->obj->tiling_mode); in i915_gem_restore_fences()
3090 if (obj->tiling_mode != I915_TILING_NONE) { in i965_write_fence_reg()
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Di915_drv.h1950 unsigned int tiling_mode:2; member
2781 i915_gem_get_gtt_size(struct drm_device *dev, uint32_t size, int tiling_mode);
2784 int tiling_mode, bool fenced);
2978 obj->tiling_mode != I915_TILING_NONE; in i915_gem_object_needs_bit17_swizzle()
Dintel_display.c2468 unsigned int tiling_mode, in intel_gen4_compute_page_offset() argument
2472 if (tiling_mode != I915_TILING_NONE) { in intel_gen4_compute_page_offset()
2563 obj->tiling_mode = plane_config->tiling; in intel_alloc_initial_plane_obj()
2564 if (obj->tiling_mode == I915_TILING_X) in intel_alloc_initial_plane_obj()
2655 if (obj->tiling_mode != I915_TILING_NONE) in intel_find_initial_plane_obj()
2750 obj->tiling_mode != I915_TILING_NONE) in i9xx_update_primary_plane()
2760 intel_gen4_compute_page_offset(&x, &y, obj->tiling_mode, in i9xx_update_primary_plane()
2855 if (obj->tiling_mode != I915_TILING_NONE) in ironlake_update_primary_plane()
2863 intel_gen4_compute_page_offset(&x, &y, obj->tiling_mode, in ironlake_update_primary_plane()
9738 obj->tiling_mode); in intel_gen4_queue_flip()
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Dintel_fbc.c582 if (obj->tiling_mode != I915_TILING_X || in intel_fbc_update()
Dintel_drv.h1034 unsigned int tiling_mode,
Dintel_overlay.c1108 if (new_bo->tiling_mode) { in intel_overlay_put_image()
Di915_gem_execbuffer.c711 obj->tiling_mode != I915_TILING_NONE; in i915_gem_execbuffer_reserve()
Di915_gpu_error.c694 err->tiling = obj->tiling_mode; in capture_bo()
Di915_debugfs.c107 switch (obj->tiling_mode) { in get_tiling_flag()
Dintel_pm.c1328 if (obj->tiling_mode == I915_TILING_NONE) in i9xx_update_wm()
/linux-4.1.27/include/uapi/drm/
Di915_drm.h873 __u32 tiling_mode; member
896 __u32 tiling_mode; member