| /linux-4.1.27/drivers/gpu/drm/radeon/ |
| D | radeon_object.c | 575 lobj->tiling_flags = bo->tiling_flags; in radeon_bo_list_validate()
580 lobj->tiling_flags = lobj->robj->tiling_flags; in radeon_bo_list_validate()
596 if (!bo->tiling_flags) in radeon_bo_get_surface_reg()
635 radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch, in radeon_bo_get_surface_reg()
657 uint32_t tiling_flags, uint32_t pitch) in radeon_bo_set_tiling_flags() argument
665 bankw = (tiling_flags >> RADEON_TILING_EG_BANKW_SHIFT) & RADEON_TILING_EG_BANKW_MASK; in radeon_bo_set_tiling_flags()
666 bankh = (tiling_flags >> RADEON_TILING_EG_BANKH_SHIFT) & RADEON_TILING_EG_BANKH_MASK; in radeon_bo_set_tiling_flags()
667 …mtaspect = (tiling_flags >> RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT) & RADEON_TILING_EG_MACRO_TIL… in radeon_bo_set_tiling_flags()
668 …tilesplit = (tiling_flags >> RADEON_TILING_EG_TILE_SPLIT_SHIFT) & RADEON_TILING_EG_TILE_SPLIT_MASK; in radeon_bo_set_tiling_flags()
669 …stilesplit = (tiling_flags >> RADEON_TILING_EG_STENCIL_TILE_SPLIT_SHIFT) & RADEON_TILING_EG_STENCI… in radeon_bo_set_tiling_flags()
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| D | radeon_fb.c | 142 u32 tiling_flags = 0; in radeonfb_create_pinned_object() local
169 tiling_flags = RADEON_TILING_MACRO; in radeonfb_create_pinned_object()
174 tiling_flags |= RADEON_TILING_SWAP_32BIT; in radeonfb_create_pinned_object()
177 tiling_flags |= RADEON_TILING_SWAP_16BIT; in radeonfb_create_pinned_object()
183 if (tiling_flags) { in radeonfb_create_pinned_object()
185 tiling_flags | RADEON_TILING_SURFACE, in radeonfb_create_pinned_object()
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| D | radeon_object.h | 147 u32 tiling_flags, u32 pitch);
149 u32 *tiling_flags, u32 *pitch);
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| D | r200.c | 221 if (reloc->tiling_flags & RADEON_TILING_MACRO) in r200_packet0_check()
223 if (reloc->tiling_flags & RADEON_TILING_MICRO) in r200_packet0_check()
293 if (reloc->tiling_flags & RADEON_TILING_MACRO) in r200_packet0_check()
295 if (reloc->tiling_flags & RADEON_TILING_MICRO) in r200_packet0_check()
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| D | r300.c | 695 if (reloc->tiling_flags & RADEON_TILING_MACRO) in r300_packet0_check()
697 if (reloc->tiling_flags & RADEON_TILING_MICRO) in r300_packet0_check()
699 else if (reloc->tiling_flags & RADEON_TILING_MICRO_SQUARE) in r300_packet0_check()
764 if (reloc->tiling_flags & RADEON_TILING_MACRO) in r300_packet0_check()
766 if (reloc->tiling_flags & RADEON_TILING_MICRO) in r300_packet0_check()
768 else if (reloc->tiling_flags & RADEON_TILING_MICRO_SQUARE) in r300_packet0_check()
849 if (reloc->tiling_flags & RADEON_TILING_MACRO) in r300_packet0_check()
851 if (reloc->tiling_flags & RADEON_TILING_MICRO) in r300_packet0_check()
853 else if (reloc->tiling_flags & RADEON_TILING_MICRO_SQUARE) in r300_packet0_check()
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| D | evergreen_cs.c | 89 static u32 evergreen_cs_get_aray_mode(u32 tiling_flags) in evergreen_cs_get_aray_mode() argument
91 if (tiling_flags & RADEON_TILING_MACRO) in evergreen_cs_get_aray_mode()
93 else if (tiling_flags & RADEON_TILING_MICRO) in evergreen_cs_get_aray_mode()
1200 ib[idx] |= Z_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); in evergreen_cs_check_reg()
1201 track->db_z_info |= Z_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); in evergreen_cs_check_reg()
1202 if (reloc->tiling_flags & RADEON_TILING_MACRO) { in evergreen_cs_check_reg()
1205 evergreen_tiling_fields(reloc->tiling_flags, in evergreen_cs_check_reg()
1385 ib[idx] |= CB_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); in evergreen_cs_check_reg()
1386 track->cb_color_info[tmp] |= CB_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); in evergreen_cs_check_reg()
1403 ib[idx] |= CB_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); in evergreen_cs_check_reg()
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| D | radeon_legacy_crtc.c | 381 uint32_t tiling_flags; in radeon_crtc_do_set_base() local
463 radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); in radeon_crtc_do_set_base()
465 if (tiling_flags & RADEON_TILING_MICRO) in radeon_crtc_do_set_base()
483 if (tiling_flags & RADEON_TILING_MACRO) { in radeon_crtc_do_set_base()
499 if (tiling_flags & RADEON_TILING_MACRO) { in radeon_crtc_do_set_base()
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| D | atombios_crtc.c | 1147 uint32_t fb_format, fb_pitch_pixels, tiling_flags; in dce4_crtc_do_set_base() local
1188 radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); in dce4_crtc_do_set_base()
1261 if (tiling_flags & RADEON_TILING_MACRO) { in dce4_crtc_do_set_base()
1262 evergreen_tiling_fields(tiling_flags, &bankw, &bankh, &mtaspect, &tile_split); in dce4_crtc_do_set_base()
1334 } else if (tiling_flags & RADEON_TILING_MICRO) in dce4_crtc_do_set_base()
1464 uint32_t fb_format, fb_pitch_pixels, tiling_flags; in avivo_crtc_do_set_base() local
1503 radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); in avivo_crtc_do_set_base()
1564 if (tiling_flags & RADEON_TILING_MACRO) in avivo_crtc_do_set_base()
1566 else if (tiling_flags & RADEON_TILING_MICRO) in avivo_crtc_do_set_base()
1569 if (tiling_flags & RADEON_TILING_MACRO) in avivo_crtc_do_set_base()
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| D | r100.c | 1283 if (reloc->tiling_flags & RADEON_TILING_MACRO) in r100_reloc_pitch_offset()
1285 if (reloc->tiling_flags & RADEON_TILING_MICRO) { in r100_reloc_pitch_offset()
1625 if (reloc->tiling_flags & RADEON_TILING_MACRO) in r100_packet0_check()
1627 if (reloc->tiling_flags & RADEON_TILING_MICRO) in r100_packet0_check()
1706 if (reloc->tiling_flags & RADEON_TILING_MACRO) in r100_packet0_check()
1708 if (reloc->tiling_flags & RADEON_TILING_MICRO) in r100_packet0_check()
3096 uint32_t tiling_flags, uint32_t pitch, in r100_set_surface_reg() argument
3103 if ((tiling_flags & (RADEON_TILING_MACRO|RADEON_TILING_MICRO)) in r100_set_surface_reg()
3106 if (tiling_flags & RADEON_TILING_MACRO) in r100_set_surface_reg()
3109 if ((tiling_flags & (RADEON_TILING_MACRO|RADEON_TILING_MICRO)) in r100_set_surface_reg()
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| D | r600_cs.c | 1044 if (reloc->tiling_flags & RADEON_TILING_MACRO) { in r600_cs_check_reg()
1143 if (reloc->tiling_flags & RADEON_TILING_MACRO) { in r600_cs_check_reg()
1146 } else if (reloc->tiling_flags & RADEON_TILING_MICRO) { in r600_cs_check_reg()
1474 u32 tiling_flags) in r600_check_texture_resource() argument
1496 if (tiling_flags & RADEON_TILING_MACRO) in r600_check_texture_resource()
1498 else if (tiling_flags & RADEON_TILING_MICRO) in r600_check_texture_resource()
1967 if (reloc->tiling_flags & RADEON_TILING_MACRO) in r600_packet3_check()
1969 else if (reloc->tiling_flags & RADEON_TILING_MICRO) in r600_packet3_check()
1985 reloc->tiling_flags); in r600_packet3_check()
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| D | radeon_gem.c | 497 r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch); in radeon_gem_set_tiling_ioctl()
518 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch); in radeon_gem_get_tiling_ioctl()
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| D | radeon_vm.c | 146 list[0].tiling_flags = 0; in radeon_vm_get_bos()
158 list[idx].tiling_flags = 0; in radeon_vm_get_bos()
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| D | radeon_display.c | 460 uint32_t tiling_flags, pitch_pixels; in radeon_crtc_page_flip() local
507 radeon_bo_get_tiling_flags(new_rbo, &tiling_flags, NULL); in radeon_crtc_page_flip()
515 if (tiling_flags & RADEON_TILING_MACRO) { in radeon_crtc_page_flip()
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| D | radeon.h | 347 extern void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw,
463 uint32_t tiling_flags; member
496 u32 tiling_flags; member
1940 uint32_t tiling_flags, uint32_t pitch,
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| D | radeon_asic.h | 91 uint32_t tiling_flags, uint32_t pitch,
339 uint32_t tiling_flags, uint32_t pitch,
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| D | evergreen.c | 1037 void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw, in evergreen_tiling_fields() argument
1041 *bankw = (tiling_flags >> RADEON_TILING_EG_BANKW_SHIFT) & RADEON_TILING_EG_BANKW_MASK; in evergreen_tiling_fields()
1042 *bankh = (tiling_flags >> RADEON_TILING_EG_BANKH_SHIFT) & RADEON_TILING_EG_BANKH_MASK; in evergreen_tiling_fields()
1043 …*mtaspect = (tiling_flags >> RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT) & RADEON_TILING_EG_MACRO_TI… in evergreen_tiling_fields()
1044 …*tile_split = (tiling_flags >> RADEON_TILING_EG_TILE_SPLIT_SHIFT) & RADEON_TILING_EG_TILE_SPLIT_MA… in evergreen_tiling_fields()
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| D | r600.c | 2979 uint32_t tiling_flags, uint32_t pitch, in r600_set_surface_reg() argument
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| /linux-4.1.27/include/uapi/drm/ |
| D | radeon_drm.h | 854 uint32_t tiling_flags; member
860 uint32_t tiling_flags; member
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