Searched refs:tRCD (Results 1 - 12 of 12) sorted by relevance

/linux-4.1.27/lib/
H A Djedec_ddr_data.c40 .tRCD = 18000,
61 .tRCD = 18000,
82 .tRCD = 18000,
103 .tRCD = 18000,
124 .tRCD = 3,
/linux-4.1.27/arch/arm/mach-omap2/
H A Dsdram-nokia.c30 u32 tRCD; member in struct:sdram_timings
50 .tRCD = 20483,
71 .tRCD = 22500,
92 .tRCD = 20483,
113 .tRCD = 20000,
247 SDRC_SET_ONE_PS(&actim_ctrla, 12, 14, tRCD, l3_rate); sdrc_timings()
/linux-4.1.27/drivers/memory/
H A Dof_memory.c41 ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD); of_get_min_tck()
73 ret |= of_property_read_u32(np, "tRCD", &tim->tRCD); of_do_get_timings()
H A Demif.c457 val = max(min_tck->tRCD, DIV_ROUND_UP(timings->tRCD, t_ck)) - 1; get_sdram_tim_1_shdw()
497 val = max(min_tck->tRCD, DIV_ROUND_UP(timings->tRCD + 1875, t_ck)); get_sdram_tim_1_shdw_derated()
/linux-4.1.27/include/memory/
H A Djedec_ddr.h133 u32 tRCD; member in struct:lpddr2_timings
157 u32 tRCD; member in struct:lpddr2_min_tck
/linux-4.1.27/arch/blackfin/mach-bf533/include/mach/
H A DdefBF532.h791 #define TRCD_1 0x00008000 /* SDRAM tRCD = 1 cycle */
792 #define TRCD_2 0x00010000 /* SDRAM tRCD = 2 cycles */
793 #define TRCD_3 0x00018000 /* SDRAM tRCD = 3 cycles */
794 #define TRCD_4 0x00020000 /* SDRAM tRCD = 4 cycles */
795 #define TRCD_5 0x00028000 /* SDRAM tRCD = 5 cycles */
796 #define TRCD_6 0x00030000 /* SDRAM tRCD = 6 cycles */
797 #define TRCD_7 0x00038000 /* SDRAM tRCD = 7 cycles */
/linux-4.1.27/arch/blackfin/mach-bf518/include/mach/
H A DdefBF512.h994 #define TRCD_1 0x00008000 /* SDRAM tRCD = 1 cycle */
995 #define TRCD_2 0x00010000 /* SDRAM tRCD = 2 cycles */
996 #define TRCD_3 0x00018000 /* SDRAM tRCD = 3 cycles */
997 #define TRCD_4 0x00020000 /* SDRAM tRCD = 4 cycles */
998 #define TRCD_5 0x00028000 /* SDRAM tRCD = 5 cycles */
999 #define TRCD_6 0x00030000 /* SDRAM tRCD = 6 cycles */
1000 #define TRCD_7 0x00038000 /* SDRAM tRCD = 7 cycles */
/linux-4.1.27/arch/blackfin/mach-bf527/include/mach/
H A DdefBF522.h995 #define TRCD_1 0x00008000 /* SDRAM tRCD = 1 cycle */
996 #define TRCD_2 0x00010000 /* SDRAM tRCD = 2 cycles */
997 #define TRCD_3 0x00018000 /* SDRAM tRCD = 3 cycles */
998 #define TRCD_4 0x00020000 /* SDRAM tRCD = 4 cycles */
999 #define TRCD_5 0x00028000 /* SDRAM tRCD = 5 cycles */
1000 #define TRCD_6 0x00030000 /* SDRAM tRCD = 6 cycles */
1001 #define TRCD_7 0x00038000 /* SDRAM tRCD = 7 cycles */
/linux-4.1.27/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h1316 #define TRCD_1 0x00008000 /* SDRAM tRCD = 1 cycle */
1317 #define TRCD_2 0x00010000 /* SDRAM tRCD = 2 cycles */
1318 #define TRCD_3 0x00018000 /* SDRAM tRCD = 3 cycles */
1319 #define TRCD_4 0x00020000 /* SDRAM tRCD = 4 cycles */
1320 #define TRCD_5 0x00028000 /* SDRAM tRCD = 5 cycles */
1321 #define TRCD_6 0x00030000 /* SDRAM tRCD = 6 cycles */
1322 #define TRCD_7 0x00038000 /* SDRAM tRCD = 7 cycles */
/linux-4.1.27/arch/blackfin/mach-bf561/include/mach/
H A DdefBF561.h1333 #define TRCD_1 0x00008000 /* SDRAM tRCD = 1 cycle */
1334 #define TRCD_2 0x00010000 /* SDRAM tRCD = 2 cycles */
1335 #define TRCD_3 0x00018000 /* SDRAM tRCD = 3 cycles */
1336 #define TRCD_4 0x00020000 /* SDRAM tRCD = 4 cycles */
1337 #define TRCD_5 0x00028000 /* SDRAM tRCD = 5 cycles */
1338 #define TRCD_6 0x00030000 /* SDRAM tRCD = 6 cycles */
1339 #define TRCD_7 0x00038000 /* SDRAM tRCD = 7 cycles */
/linux-4.1.27/arch/blackfin/mach-bf538/include/mach/
H A DdefBF538.h1708 #define TRCD_1 0x00008000 /* SDRAM tRCD = 1 cycle */
1709 #define TRCD_2 0x00010000 /* SDRAM tRCD = 2 cycles */
1710 #define TRCD_3 0x00018000 /* SDRAM tRCD = 3 cycles */
1711 #define TRCD_4 0x00020000 /* SDRAM tRCD = 4 cycles */
1712 #define TRCD_5 0x00028000 /* SDRAM tRCD = 5 cycles */
1713 #define TRCD_6 0x00030000 /* SDRAM tRCD = 6 cycles */
1714 #define TRCD_7 0x00038000 /* SDRAM tRCD = 7 cycles */
/linux-4.1.27/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h1733 #define DDR_TRCD(x) (x&TRCD) /* DDR tRCD = (1~15) cycles */

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