/linux-4.1.27/drivers/clk/qcom/ |
H A D | clk-pll.h | 43 * @status_bit: ANDed with @status_reg to determine if PLL is enabled 54 u8 status_bit; member in struct:clk_pll
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H A D | clk-pll.c | 204 if (val & BIT(pll->status_bit)) wait_for_pll()
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H A D | gcc-ipq806x.c | 42 .status_bit = 16, 69 .status_bit = 16, 96 .status_bit = 16, 123 .status_bit = 16,
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H A D | lcc-ipq806x.c | 41 .status_bit = 16,
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H A D | gcc-msm8916.c | 202 .status_bit = 17, 229 .status_bit = 17, 256 .status_bit = 17, 283 .status_bit = 17,
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H A D | lcc-msm8960.c | 41 .status_bit = 16,
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H A D | gcc-msm8974.c | 73 .status_bit = 17, 136 .status_bit = 17, 163 .status_bit = 17,
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H A D | mmcc-msm8974.c | 195 .status_bit = 17, 222 .status_bit = 17, 264 .status_bit = 17,
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H A D | gcc-apq8084.c | 117 .status_bit = 17, 180 .status_bit = 17, 207 .status_bit = 17,
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H A D | gcc-msm8960.c | 42 .status_bit = 16, 69 .status_bit = 16, 96 .status_bit = 16,
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H A D | mmcc-apq8084.c | 230 .status_bit = 17, 257 .status_bit = 17, 299 .status_bit = 17,
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H A D | mmcc-msm8960.c | 94 .status_bit = 16, 110 .status_bit = 16,
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H A D | gcc-msm8660.c | 42 .status_bit = 16,
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/linux-4.1.27/drivers/clk/bcm/ |
H A D | clk-kona.h | 131 u32 status_bit; /* 0: gate is disabled; 0: gatge is enabled */ member in struct:bcm_clk_gate 162 .status_bit = (_status_bit), \ 174 .status_bit = (_status_bit), \ 185 .status_bit = (_status_bit), \ 196 .status_bit = (_status_bit), \ 206 .status_bit = (_status_bit), \
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H A D | clk-kona.c | 365 bit_mask = 1 << gate->status_bit; __is_clk_gate_enabled() 436 return __ccu_wait_bit(ccu, gate->offset, gate->status_bit, enabled); __gate_commit()
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H A D | clk-kona-setup.c | 258 if (!bit_posn_valid(gate->status_bit, "gate status", clock_name)) gate_valid()
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/linux-4.1.27/arch/arm/mach-omap2/ |
H A D | cm2xxx.c | 140 static int _omap2xxx_apll_enable(u8 enable_bit, u8 status_bit) _omap2xxx_apll_enable() argument 153 omap2xxx_cm_wait_module_ready(0, PLL_MOD, 1, status_bit); _omap2xxx_apll_enable()
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/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/therm/ |
H A D | g84.c | 96 uint32_t thrs_reg, u8 status_bit, g84_therm_threshold_hyst_emulation() 95 g84_therm_threshold_hyst_emulation(struct nvkm_therm *therm, uint32_t thrs_reg, u8 status_bit, const struct nvbios_therm_threshold *thrs, enum nvkm_therm_thrs thrs_name) g84_therm_threshold_hyst_emulation() argument
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