Searched refs:sdh_parent_names (Results 1 - 3 of 3) sorted by relevance

/linux-4.1.27/drivers/clk/mmp/
H A Dclk-of-pxa168.c170 static const char *sdh_parent_names[] = {"pll1_12", "pll1_13"}; variable
182 {0, "sdh0_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH0, 6, 1, 0, &sdh0_lock},
183 {0, "sdh1_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH1, 6, 1, 0, &sdh1_lock},
H A Dclk-of-pxa910.c172 static const char *sdh_parent_names[] = {"pll1_12", "pll1_13"}; variable
184 {0, "sdh0_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH0, 6, 1, 0, &sdh0_lock},
185 {0, "sdh1_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH1, 6, 1, 0, &sdh1_lock},
H A Dclk-of-mmp2.c187 static const char *sdh_parent_names[] = {"pll1_4", "pll2", "usb_pll", "pll1"}; variable
246 clk = mmp_clk_register_mix(NULL, "sdh_mix_clk", sdh_parent_names, mmp2_axi_periph_clk_init()
247 ARRAY_SIZE(sdh_parent_names), mmp2_axi_periph_clk_init()

Completed in 123 milliseconds