Searched refs:sclk_frequency (Results 1 – 4 of 4) sorted by relevance
737 if (table->entries[i].sclk_frequency == pi->boot_pl.sclk) in kv_program_bootup_state()1106 if (kv_get_clock_difference(table->entries[i].sclk_frequency, 40000) < 200) in kv_calculate_dfs_bypass_settings()1108 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 30000) < 200) in kv_calculate_dfs_bypass_settings()1110 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 26600) < 200) in kv_calculate_dfs_bypass_settings()1112 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 20000) < 200) in kv_calculate_dfs_bypass_settings()1114 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 10000) < 200) in kv_calculate_dfs_bypass_settings()1741 if (table->entries[i].sclk_frequency >= new_ps->levels[0].sclk || in kv_set_valid_clock_range()1749 if (table->entries[i].sclk_frequency <= in kv_set_valid_clock_range()1757 table->entries[pi->highest_valid].sclk_frequency) > in kv_set_valid_clock_range()1758 (table->entries[pi->lowest_valid].sclk_frequency - in kv_set_valid_clock_range()[all …]
70 u32 sclk_frequency; member
1036 if (pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency >= lower_limit) in sumo_get_valid_engine_clock()1037 return pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency; in sumo_get_valid_engine_clock()1040 …ping_table.entries[pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries - 1].sclk_frequency; in sumo_get_valid_engine_clock()1602 sclk_voltage_mapping_table->entries[n].sclk_frequency = in sumo_construct_sclk_voltage_mapping_table()
1370 if (pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency >= lower_limit) in trinity_get_valid_engine_clock()1371 return pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency; in trinity_get_valid_engine_clock()