Searched refs:reference_clock (Results 1 – 10 of 10) sorted by relevance
| /linux-4.1.27/drivers/gpu/drm/radeon/ |
| D | rv740_dpm.c | 132 u32 reference_clock = rdev->clock.spll.reference_freq; in rv740_populate_sclk_value() local
145 do_div(tmp, reference_clock); in rv740_populate_sclk_value()
165 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv740_populate_sclk_value()
252 u32 reference_clock = rdev->clock.mpll.reference_freq; in rv740_populate_mclk_value() local
254 u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); in rv740_populate_mclk_value()
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| D | rv730_dpm.c | 52 u32 reference_clock = rdev->clock.spll.reference_freq; in rv730_populate_sclk_value() local
71 do_div(tmp, reference_clock); in rv730_populate_sclk_value()
97 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv730_populate_sclk_value()
172 u32 reference_clock = rdev->clock.mpll.reference_freq; in rv730_populate_mclk_value() local
173 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv730_populate_mclk_value()
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| D | rv770_dpm.c | 319 u32 reference_clock, in rv770_calculate_fractional_mpll_feedback_divider() argument
337 (8 * fyclk * reference_divider * post_divider) / reference_clock; in rv770_calculate_fractional_mpll_feedback_divider()
404 u32 reference_clock = rdev->clock.mpll.reference_freq; in rv770_populate_mclk_value() local
418 rv770_calculate_fractional_mpll_feedback_divider(memory_clock, reference_clock, in rv770_populate_mclk_value()
446 reference_clock, in rv770_populate_mclk_value()
501 u32 reference_clock = rdev->clock.spll.reference_freq; in rv770_populate_sclk_value() local
519 do_div(tmp, reference_clock); in rv770_populate_sclk_value()
544 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv770_populate_sclk_value()
1706 u32 reference_clock; in rv770_program_response_times() local
1720 reference_clock = radeon_get_xclk(rdev); in rv770_program_response_times()
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| D | ni_dpm.c | 1224 u32 reference_clock; in ni_program_response_times() local
1240 reference_clock = radeon_get_xclk(rdev); in ni_program_response_times()
1242 vddc_dly = (voltage_response_time * reference_clock) / 1600; in ni_program_response_times()
1243 bb_dly = (backbias_response_time * reference_clock) / 1600; in ni_program_response_times()
1244 acpi_dly = (acpi_delay_time * reference_clock) / 1600; in ni_program_response_times()
1245 vbi_dly = (vbi_time_out * reference_clock) / 1600; in ni_program_response_times()
1247 mclk_switch_limit = (460 * reference_clock) / 100; in ni_program_response_times()
2012 u32 reference_clock = rdev->clock.spll.reference_freq; in ni_calculate_sclk_params() local
2026 do_div(tmp, reference_clock); in ni_calculate_sclk_params()
2046 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in ni_calculate_sclk_params()
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| D | cypress_dpm.c | 276 u32 reference_clock; in cypress_program_response_times() local
279 reference_clock = radeon_get_xclk(rdev); in cypress_program_response_times()
280 mclk_switch_limit = (460 * reference_clock) / 100; in cypress_program_response_times()
559 u32 reference_clock = rdev->clock.mpll.reference_freq; in cypress_populate_mclk_value() local
561 u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); in cypress_populate_mclk_value()
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| D | si_dpm.c | 3583 u32 reference_clock; in si_program_response_times() local
3596 reference_clock = radeon_get_xclk(rdev); in si_program_response_times()
3598 vddc_dly = (voltage_response_time * reference_clock) / 100; in si_program_response_times()
3599 acpi_dly = (acpi_delay_time * reference_clock) / 100; in si_program_response_times()
3600 vbi_dly = (vbi_time_out * reference_clock) / 100; in si_program_response_times()
4734 u32 reference_clock = rdev->clock.spll.reference_freq; in si_calculate_sclk_params() local
4747 do_div(tmp, reference_clock); in si_calculate_sclk_params()
4767 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in si_calculate_sclk_params()
4856 u32 reference_clock = rdev->clock.mpll.reference_freq; in si_populate_mclk_value() local
4863 tmp = freq_nom / reference_clock; in si_populate_mclk_value()
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| D | rv770.c | 792 u32 reference_clock = rdev->clock.spll.reference_freq; in rv770_get_xclk() local
799 return reference_clock / 4; in rv770_get_xclk()
801 return reference_clock; in rv770_get_xclk()
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| D | ci_dpm.c | 955 u32 reference_clock, tmp; in ci_thermal_setup_fan_table() local
1001 reference_clock = radeon_get_xclk(rdev); in ci_thermal_setup_fan_table()
1004 reference_clock) / 1600); in ci_thermal_setup_fan_table()
2801 u32 reference_clock = rdev->clock.mpll.reference_freq; in ci_calculate_mclk_params() local
2808 tmp = (freq_nom / reference_clock); in ci_calculate_mclk_params()
2812 u32 clks = reference_clock * 5 / ss.rate; in ci_calculate_mclk_params()
3139 u32 reference_clock = rdev->clock.spll.reference_freq; in ci_calculate_sclk_params() local
3163 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in ci_calculate_sclk_params()
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| D | cik.c | 1690 u32 reference_clock = rdev->clock.spll.reference_freq; in cik_get_xclk() local
1694 return reference_clock / 2; in cik_get_xclk()
1697 return reference_clock / 4; in cik_get_xclk()
1699 return reference_clock; in cik_get_xclk()
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| D | si.c | 1310 u32 reference_clock = rdev->clock.spll.reference_freq; in si_get_xclk() local
1319 return reference_clock / 4; in si_get_xclk()
1321 return reference_clock; in si_get_xclk()
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