Searched refs:rb_cntl (Results 1 - 4 of 4) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/radeon/
H A Dni_dma.c159 u32 rb_cntl; cayman_dma_stop() local
166 rb_cntl = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET); cayman_dma_stop()
167 rb_cntl &= ~DMA_RB_ENABLE; cayman_dma_stop()
168 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, rb_cntl); cayman_dma_stop()
171 rb_cntl = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET); cayman_dma_stop()
172 rb_cntl &= ~DMA_RB_ENABLE; cayman_dma_stop()
173 WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, rb_cntl); cayman_dma_stop()
190 u32 rb_cntl, dma_cntl, ib_cntl; cayman_dma_resume() local
211 rb_cntl = rb_bufsz << 1; cayman_dma_resume()
213 rb_cntl |= DMA_RB_SWAP_ENABLE | DMA_RPTR_WRITEBACK_SWAP_ENABLE; cayman_dma_resume()
215 WREG32(DMA_RB_CNTL + reg_offset, rb_cntl); cayman_dma_resume()
228 rb_cntl |= DMA_RPTR_WRITEBACK_ENABLE; cayman_dma_resume()
246 WREG32(DMA_RB_CNTL + reg_offset, rb_cntl | DMA_RB_ENABLE); cayman_dma_resume()
H A Dr600_dma.c101 u32 rb_cntl = RREG32(DMA_RB_CNTL); r600_dma_stop() local
106 rb_cntl &= ~DMA_RB_ENABLE; r600_dma_stop()
107 WREG32(DMA_RB_CNTL, rb_cntl); r600_dma_stop()
123 u32 rb_cntl, dma_cntl, ib_cntl; r600_dma_resume() local
132 rb_cntl = rb_bufsz << 1; r600_dma_resume()
134 rb_cntl |= DMA_RB_SWAP_ENABLE | DMA_RPTR_WRITEBACK_SWAP_ENABLE; r600_dma_resume()
136 WREG32(DMA_RB_CNTL, rb_cntl); r600_dma_resume()
149 rb_cntl |= DMA_RPTR_WRITEBACK_ENABLE; r600_dma_resume()
170 WREG32(DMA_RB_CNTL, rb_cntl | DMA_RB_ENABLE); r600_dma_resume()
H A Dcik_sdma.c252 u32 rb_cntl, reg_offset; cik_sdma_gfx_stop() local
264 rb_cntl = RREG32(SDMA0_GFX_RB_CNTL + reg_offset); cik_sdma_gfx_stop()
265 rb_cntl &= ~SDMA_RB_ENABLE; cik_sdma_gfx_stop()
266 WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl); cik_sdma_gfx_stop()
368 u32 rb_cntl, ib_cntl; cik_sdma_gfx_resume() local
389 rb_cntl = rb_bufsz << 1; cik_sdma_gfx_resume()
391 rb_cntl |= SDMA_RB_SWAP_ENABLE | SDMA_RPTR_WRITEBACK_SWAP_ENABLE; cik_sdma_gfx_resume()
393 WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl); cik_sdma_gfx_resume()
406 rb_cntl |= SDMA_RPTR_WRITEBACK_ENABLE; cik_sdma_gfx_resume()
415 WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl | SDMA_RB_ENABLE); cik_sdma_gfx_resume()
H A Dni.c1670 uint32_t rb_cntl; cayman_cp_resume() local
1675 rb_cntl = order_base_2(ring->ring_size / 8); cayman_cp_resume()
1676 rb_cntl |= order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8; cayman_cp_resume()
1678 rb_cntl |= BUF_SWAP_32BIT; cayman_cp_resume()
1680 WREG32(cp_rb_cntl[i], rb_cntl); cayman_cp_resume()

Completed in 140 milliseconds