Searched refs:r19 (Results 1 - 131 of 131) sorted by relevance

/linux-4.1.27/arch/sh/lib64/
H A Dudivsi3.S7 clobbered: r18,r19,r20,r21,r22,r25,tr0
17 mmulfx.w r21,r21,r19
20 mmulfx.w r25,r19,r19
23 msub.w r21,r19,r19
27 * the msub.w, but we need a different value for r19 to keep
30 addi r19,-2,r21
32 mmulfx.w r19,r19,r19
36 mmacnfx.wl r25,r19,r21
40 mulu.l r25,r21,r19
43 shlrd r19,r0,r19
44 mulu.l r19,r22,r20
45 add r18,r19,r18
49 mulu.l r25,r21,r19
52 shlrd r19,r0,r19
53 mulu.l r19,r22,r20
55 add r18,r19,r18
H A Dsdivsi3.S8 /* clobbered: r1,r18,r19,r20,r21,r25,tr0 */
20 ldx.ub r20, r21, r19 /* u0.8 */
23 muls.l r25, r19, r19 /* s2.38 */
26 shari r19, 24, r19 /* truncate to s2.14 */
27 sub r21, r19, r19 /* some 11 bit inverse in s1.14 */
28 muls.l r19, r19, r21 /* u0.28 */
32 shlli r19, 45, r19 /* multiply by two and convert to s2.58 */
34 sub r19, r18, r18
39 shari r0, 16, r19 /* s-16.44 */
40 muls.l r19, r18, r19 /* s-16.74 */
43 shari r19, 30, r19 /* s-16.44 */
44 muls.l r19, r18, r19 /* s15.30 */
47 sub r21, r19, r21
H A Dudivdi3.S23 shlri r2,32+14,r19
29 mulu.l r5,r19,r5
H A Dcopy_user_memcpy.S176 addi r6, -24, r19
185 ldx.q r22, r19, r23
H A Dmemcpy.S161 addi r6, -24, r19
169 ldx.q r22, r19, r23
/linux-4.1.27/arch/unicore32/lib/
H A Dcopy_page.S27 stm.w (r17 - r19, lr), [sp-]
30 mov r19, #COPY_COUNT
36 sub.a r19, r19, #1
38 ldm.w (r17 - r19, pc), [sp]+
/linux-4.1.27/arch/parisc/kernel/
H A Dunaligned.c179 " zdep %3,28,2,%%r19\n" /* r19=(ofs&3)*8 */ emulate_ldw()
184 " subi 32,%%r19,%%r19\n" emulate_ldw()
185 " mtctl %%r19,11\n" emulate_ldw()
197 : "r19", "r20", FIXUP_BRANCH_CLOBBER ); emulate_ldw()
223 " depd,z %3,60,3,%%r19\n" /* r19=(ofs&7)*8 */ emulate_ldd()
228 " subi 64,%%r19,%%r19\n" emulate_ldd()
229 " mtsar %%r19\n" emulate_ldd()
241 : "r19", "r20", FIXUP_BRANCH_CLOBBER ); emulate_ldd()
246 " zdep %5,29,2,%%r19\n" /* r19=(ofs&3)*8 */ emulate_ldd()
252 " subi 32,%%r19,%%r19\n" emulate_ldd()
253 " mtsar %%r19\n" emulate_ldd()
267 : "r19", "r20", FIXUP_BRANCH_CLOBBER ); emulate_ldd()
295 " extrw,u %1, 23, 8, %%r19\n" emulate_sth()
297 "2: stb %%r19, 0(%%sr1, %2)\n" emulate_sth()
308 : "r19", FIXUP_BRANCH_CLOBBER ); emulate_sth()
331 " zdep %2, 28, 2, %%r19\n" emulate_stw()
333 " mtsar %%r19\n" emulate_stw()
334 " depwi,z -2, %%sar, 32, %%r19\n" emulate_stw()
339 " and %%r20, %%r19, %%r20\n" emulate_stw()
340 " andcm %%r21, %%r19, %%r21\n" emulate_stw()
355 : "r19", "r20", "r21", "r22", "r1", FIXUP_BRANCH_CLOBBER ); emulate_stw()
381 " depd,z %2, 60, 3, %%r19\n" emulate_std()
383 " mtsar %%r19\n" emulate_std()
384 " depdi,z -2, %%sar, 64, %%r19\n" emulate_std()
389 " and %%r20, %%r19, %%r20\n" emulate_std()
390 " andcm %%r21, %%r19, %%r21\n" emulate_std()
407 : "r19", "r20", "r21", "r22", "r1", FIXUP_BRANCH_CLOBBER ); emulate_std()
413 " zdep %2, 29, 2, %%r19\n" emulate_std()
415 " mtsar %%r19\n" emulate_std()
416 " zvdepi -2, 32, %%r19\n" emulate_std()
422 " and %%r20, %%r19, %%r20\n" emulate_std()
423 " andcm %%r21, %%r19, %%r21\n" emulate_std()
442 : "r19", "r20", "r21", "r1", FIXUP_BRANCH_CLOBBER ); emulate_std()
H A Dpacache.S57 rsm PSW_SM_I, %r19 /* save I-bit state */
183 or %r1, %r19, %r1 /* I-bit to state on entry */
443 1: ldd 0(%r25), %r19
448 std %r19, 0(%r26)
451 ldd 32(%r25), %r19
458 std %r19, 32(%r26)
461 ldd 64(%r25), %r19
468 std %r19, 64(%r26)
471 ldd 96(%r25), %r19
479 std %r19, 96(%r26)
498 ldw 0(%r25), %r19
505 stw %r19, 0(%r26)
509 ldw 16(%r25), %r19
513 stw %r19, 16(%r26)
517 ldw 32(%r25), %r19
521 stw %r19, 32(%r26)
525 ldw 48(%r25), %r19
529 stw %r19, 48(%r26)
536 ldw 0(%r25), %r19
638 ldd 0(%r29), %r19
645 std %r19, 0(%r28)
648 ldd 32(%r29), %r19
655 std %r19, 32(%r28)
658 ldd 64(%r29), %r19
665 std %r19, 64(%r28)
668 ldd 96(%r29), %r19
675 std %r19, 96(%r28)
688 ldd 0(%r29), %r19 /* start next loads */
702 1: ldw 0(%r29), %r19
706 stw %r19, 0(%r28)
710 ldw 16(%r29), %r19
714 stw %r19, 16(%r28)
718 ldw 32(%r29), %r19
722 stw %r19, 32(%r28)
726 ldw 48(%r29), %r19
730 stw %r19, 48(%r28)
H A Dentry.S831 LDREG PT_IAOQ0(%r16),%r19
832 depi 3,31,2,%r19
833 STREG %r19,PT_IAOQ0(%r16)
834 LDREG PT_IAOQ1(%r16),%r19
835 depi 3,31,2,%r19
836 STREG %r19,PT_IAOQ1(%r16)
837 LDREG PT_PSW(%r16),%r19
843 and %r19,%r1,%r19 /* Mask out bits that user shouldn't play with */
845 or %r19,%r1,%r19 /* Make sure default USER_PSW bits are set */
846 STREG %r19,PT_PSW(%r16)
859 mfsp %sr3,%r19
860 STREG %r19,PT_SR0(%r16)
861 STREG %r19,PT_SR1(%r16)
862 STREG %r19,PT_SR3(%r16)
863 STREG %r19,PT_SR4(%r16)
864 STREG %r19,PT_SR5(%r16)
865 STREG %r19,PT_SR6(%r16)
866 STREG %r19,PT_SR7(%r16)
871 LDREG TI_FLAGS(%r1),%r19 /* sched.h: TIF_NEED_RESCHED */
872 bb,<,n %r19,31-TIF_NEED_RESCHED,intr_do_resched /* forward */
878 LDREG TI_FLAGS(%r1),%r19
880 and,COND(<>) %r19, %r20, %r0
980 LDREG TI_PRE_COUNT(%r1), %r19
981 cmpib,COND(<>) 0, %r19, intr_restore /* if preempt_count > 0 */
1655 %r19 - %r20 saved in PT_REGS by gateway page
1792 LDREG TI_FLAGS-THREAD_SZ_ALGN-FRAME_SIZE(%r30),%r19 /* long */
1793 bb,<,n %r19, 31-TIF_NEED_RESCHED, syscall_do_resched /* forward */
1797 LDREG TI_FLAGS-THREAD_SZ_ALGN-FRAME_SIZE(%r30),%r19
1799 and,COND(<>) %r19, %r26, %r0
1829 ldw TASK_FLAGS(%r1),%r19
1831 and,COND(=) %r19,%r2,%r0
1834 ldo TASK_PT_FR31(%r1),%r19 /* reload fpregs */
1835 rest_fp %r19
1837 LDREG TASK_PT_SAR(%r1),%r19 /* restore SAR */
1838 mtsar %r19
1841 LDREG TASK_PT_GR19(%r1),%r19
1898 /* if ((%r19.SINGLESTEP_BIT)) { %r20.27=1} */
1899 extru,= %r19,TIF_SINGLESTEP_PA_BIT,1,%r0
1902 /* if ((%r19.BLOCKSTEP_BIT)) { %r20.7=1} */
1903 extru,= %r19,TIF_BLOCKSTEP_PA_BIT,1,%r0
2093 bv %r0(%r25) /* r19 */
2094 copy %r19,%r1
2167 bv %r0(%r25) /* r19 */
2168 copy %r1,%r19
H A Dsyscall.S161 STREG %r19, TASK_PT_GR19(%r1)
165 extrd,u %r2,63,1,%r19 /* W hidden in bottom bit */
167 xor %r19,%r2,%r2 /* clear bottom bit */
168 depd,z %r19,1,1,%r19
169 std %r19,TASK_PT_PSW(%r1)
197 copy %r19,%r2 /* W bit back to r2 */
208 ldi _TIF_SYSCALL_TRACE_MASK, %r19
209 and,COND(=) %r1, %r19, %r0
219 ldo R%sys_call_table(%r1), %r19
221 ldo R%sys_call_table64(%r1), %r19
224 ldo R%sys_call_table(%r1), %r19
229 LDREGX %r20(%r19), %r19
240 be 0(%sr7,%r19)
245 be 0(%sr7,%r19)
328 ldo R%sys_call_table(%r1), %r19
348 LDREGX %r20(%r19), %r19
359 be 0(%sr7,%r19)
387 be 0(%sr7,%r19)
434 - %r19 (32-bit PIC register)
439 - Callee-saves %r19.
H A Dreal2.S260 ldd 7*REG_SZ(%arg1), %r19
H A Dsignal.c345 DBG(1,"setup_rt_frame: 64 bit signal, exe=%#lx, r19=%#lx, in_syscall=%d\n", setup_rt_frame()
/linux-4.1.27/arch/parisc/include/asm/
H A Dchecksum.h52 " ldws,ma 12(%1), %%r19\n" ip_fast_csum()
54 " addc %0, %%r19, %0\n" ip_fast_csum()
55 "1: ldws,ma 4(%1), %%r19\n" ip_fast_csum()
57 " addc %0, %%r19, %0\n" ip_fast_csum()
68 : "r19", "r20", "r21", "memory"); ip_fast_csum()
140 " ldd,ma 8(%1), %%r19\n" /* get 1st saddr word */ csum_ipv6_magic()
143 " add %%r19, %0, %0\n" csum_ipv6_magic()
150 " extrd,u %0, 31, 32, %%r19\n" /* copy upper half down */ csum_ipv6_magic()
152 " add %%r19, %0, %0\n" /* fold into 32-bits */ csum_ipv6_magic()
163 " ldw,ma 4(%1), %%r19\n" /* get 1st saddr word */ csum_ipv6_magic()
166 " add %%r19, %0, %0\n" csum_ipv6_magic()
171 " ldw,ma 4(%1), %%r19\n" /* 3rd saddr */ csum_ipv6_magic()
174 " addc %%r19, %0, %0\n" csum_ipv6_magic()
185 : "r19", "r20", "r21", "r22", "memory"); csum_ipv6_magic()
H A Dunistd.h20 # define K_STW_ASM_PIC " copy %%r19, %%r4\n"
21 # define K_LDW_ASM_PIC " copy %%r4, %%r19\n"
35 are treated specially. Although r19 is clobbered by the syscall
37 r4 is clobbered and use that register to save/restore r19
49 /* FIXME: HACK stw/ldw r19 around syscall */ \
H A Dasmregs.h37 arg7: .reg r19
65 r19: .reg %r19
H A Dassembly.h199 STREG %r19, PT_GR19(\regs) variable
233 LDREG PT_GR19(\regs), %r19
H A Delf.h155 * the PLT pointer (r19) for PIC code */
/linux-4.1.27/arch/hexagon/
H A DMakefile28 # Thread-info register will be r19. This value is not configureable;
30 TIR_NAME := r19
/linux-4.1.27/tools/testing/selftests/powerpc/copyloops/asm/
H A Dppc_asm.h12 #define R19 r19
/linux-4.1.27/arch/ia64/kernel/
H A Divt.S81 mov r19=n;; /* prepare to save predicates */ \
119 mov r19=IA64_KR(PT_BASE) // get page table base address
137 (p7) dep r17=r17,r19,(PAGE_SHIFT-3),3 // put region number bits in place
140 LOAD_PHYSICAL(p6, r19, swapper_pg_dir) // region 5 is rooted at swapper_pg_dir
146 (p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5
171 shr.u r19=r22,PAGE_SHIFT // shift pte index into position
174 dep r21=r19,r20,3,(PAGE_SHIFT-3) // r21=pte_offset(pmd,addr)
177 MOV_FROM_ISR(r19) // cr.isr bit 32 tells us if this is an insn miss
182 (p7) tbit.nz.unc p10,p11=r19,32 // is it an instruction TLB miss?
226 ld8 r19=[r28] // read *pud again
232 cmp.ne.or.andcm p6,p7=r19,r29 // did *pud change
270 ITC_I(p0, r18, r19)
279 ld8 r19=[r17] // read *pte again and see if same
282 cmp.ne p7,p0=r18,r19
314 ITC_D(p0, r18, r19)
323 ld8 r19=[r17] // read *pte again and see if same
326 cmp.ne p7,p0=r18,r19
342 movl r19=(((1 << IA64_MAX_PHYS_BITS) - 1) & ~0xfff)
357 and r19=r19,r16 // clear ed, reserved bits, and PTE control bits
362 or r19=r17,r19 // insert PTE control bits into r19
364 or r19=r19,r18 // set bit 4 (uncached) if the access was to region 6
367 ITC_I(p0, r19, r18) // insert the TLB entry
380 movl r19=(((1 << IA64_MAX_PHYS_BITS) - 1) & ~0xfff)
403 (p10) mov r19=IA64_KR(PER_CPU_DATA)
404 (p11) and r19=r19,r16 // clear non-ppn fields
410 (p10) sub r19=r19,r26
419 or r19=r19,r17 // insert PTE control bits into r19
422 ITC_D(p7, r19, r18) // insert the TLB entry
451 * Clobbered: b0, r18, r19, r21, r22, psr.dt (cleared)
454 mov r19=IA64_KR(PT_BASE) // get the page table base address
467 (p7) dep r17=r17,r19,(PAGE_SHIFT-3),3 // put region number bits in place
470 LOAD_PHYSICAL(p6, r19, swapper_pg_dir) // region 5 is rooted at swapper_pg_dir
476 (p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5
499 shr.u r19=r22,PAGE_SHIFT // shift pte index into position
502 dep r17=r19,r17,3,(PAGE_SHIFT-3) // r17=pte_offset(pmd,addr);
736 mov r19=b6 // I0 (2 cyc)
827 ld8 r19=[r17],TI_AC_UTIME-TI_AC_LEAVE // M time at leave
831 sub r22=r19,r18 // A stime before leave
834 sub r18=r30,r19 // A elapsed time in user
912 * - r19: saved b6
945 st8 [r1]=r19 // save b6
949 alloc r19=ar.pfs,8,0,0,0 // ensure in0-in7 are writable
964 dep r19=0,r19,38,26 // clear all bits but 0..37 [I0]
968 st8 [r16]=r19,PT(AR_RNAT)-PT(CR_IFS) // store ar.pfs.pfm in cr.ifs
969 extr.u r11=r19,7,7 // I0 // get sol of ar.pfs
970 and r8=0x7f,r19 // A // get sof of ar.pfs
1062 ld8 r19=[r17],TI_AC_UTIME-TI_AC_LEAVE // time at left from kernel
1066 sub r22=r19,r18 // stime before leave kernel
1069 sub r18=r20,r19 // elapsed time in user mode
1173 mov r19=24 // fault number
1186 mov r19=25
1244 MOV_TO_IIP(r17, r19)
1248 MOV_TO_IPSR(p0, r16, r19)
1625 * r19: fault vector number (e.g., 24 for General Exception)
H A Drelocate_kernel.S70 ld4 r19=[r2],4 // r19=ptce_count[0]
81 cmp.ltu p6,p7=r24,r19
120 movl r19=PAGE_OFFSET
122 add r16=r19,r16
274 st8 [in0]=r19, 8 // r19
H A Dmca_asm.S68 ld4 r19=[r2],4 // r19=ptce_count[0]
80 cmp.ltu p6,p7=r24,r19
123 movl r19=PAGE_OFFSET
125 add r16=r19,r16
143 mov r19=1 // All MCA events are treated as monarch (for now)
174 mov r19=ip
177 dep r17=0,r19,0, KERNEL_TR_PAGE_SHIFT
196 mov r19=IA64_GRANULE_SHIFT<<2
198 mov cr.itir=r19
210 movl r19=PAGE_OFFSET
212 add r18=r19,r16
216 mov r19=IA64_GRANULE_SHIFT<<2
218 mov cr.itir=r19
325 // sos->monarch flag in r19.
329 mov r19=1 // Bow, bow, ye lower middle classes!
333 mov r19=0 // <igor>yeth, mathter</igor>
443 // r19 monarch flag, set by the caller of this routine
475 st8 [temp2]=r19 // monarch
874 extr.u r19=r13,61,3 // r13 = prev_IA64_KR_CURRENT
879 cmp.ne p6,p0=RGN_KERNEL,r19 // new stack is in the kernel region?
H A Defi_stub.S73 mov loc5=r19
78 mov r19=loc5
H A Desi_stub.S83 .ret0: mov loc5=r19 // old ar.bsp
88 mov r19=loc5 // save virtual mode bspstore
H A Dminstate.h171 .mem.offset 8,0; st8.spill [r3]=r19,16; \
179 mov r19=b7; \
208 st8 [r25]=r19,16; /* b7 */ \
249 #define SAVE_MIN_WITH_COVER_R19 DO_SAVE_MIN(COVER, mov r30=cr.ifs, mov r15=r19, RSE_WORKAROUND)
H A Dhead.S335 mov r19=IA64_TR_CURRENT_STACK
337 itr.d dtr[r19]=r18
361 movl r19=__phys_per_cpu_start
365 add r19=r19,r18
373 ld8 r21=[r19],8;;
378 mov r19=r20
382 tpa r19=r19
385 (isBP) mov IA64_KR(PER_CPU_DATA)=r19 // per-CPU base for cpu0
464 add r19=IA64_NUM_DBG_REGS*8,in0
475 st8.nta [r19]=r17,8
486 add r19=IA64_NUM_DBG_REGS*8,in0
491 ld8.nta r17=[r19],8
918 * r19 = old virtual address of ar.bsp
937 mov r19=ar.bsp
943 tpa r17=r19
966 * r19 = new bspstore to establish
1001 mov ar.bspstore=r19 // this steps on ar.rnat
1147 RESTORE_REGION_REGS(r25, r17,r18,r19);;
H A Dentry.S289 mov.m r19=ar.rnat
351 st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat
397 ld8 r19=[r15],24 // restore fpsr
455 mov ar.fpsr=r19 // restore fpsr
669 * r19: cleared
729 MOV_FROM_ITC(pUStk, p9, r22, r19) // fetch time at leave
733 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
742 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
813 shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition
817 mov r19=ar.bsp // M2 get new backing store pointer
825 mov r19=ar.bsp // M2 get new backing store pointer
886 (p6) and r19=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
890 (p6) cmp4.ne.unc p6,p0=r19, r0 // any special work pending?
906 ld8.fill r19=[r3],16
979 ld8 r19=[r16],16 // load ar.rsc value for "loadrs"
1008 shr.u r18=r19,16 // get byte size of existing "dirty" partition
1017 shr.u r18=r19,16 // get byte size of existing "dirty" partition
1032 mov r19=ar.bsp // get new backing store pointer
1037 sub r19=r19,r16 // calculate total byte size of dirty partition
1040 shl r19=r19,16 // shift size of dirty partition into loadrs position
1060 mov ar.rsc=r19 // load ar.rsc to be used for "loadrs"
1127 (pLvSys)mov r19=r0 // A clear r19 for leave_syscall, no-op otherwise
H A Dgate.S199 .save ar.rnat, r19
200 mov r19=ar.rnat // save RNaT before switching backing store area
208 st8 [r14]=r19 // save sc_ar_rnat
222 (p8) st8 [r18]=r19 // if bspstore points at RNaT slot, store RNaT there now
333 mov r19=NR_syscalls-1 // A
338 cmp.geu p6,p7=r19,r17 // A (sysnr > 0 && sysnr < 1024+NR_syscalls)?
H A Dpal.S178 mov loc5 = r19
184 mov r19=loc5
234 mov loc5 = r19
241 mov r19=loc5
H A Dfsys.S165 // r19 = address of itc_lastcycle
205 add r19 = IA64_ITC_LASTCYCLE_OFFSET,r29
237 (p13) ld8 r25 = [r19] // get itc_lastcycle value
249 (p7) cmpxchg8.rel r3 = [r19],r2,ar.ccv
500 mov r19=b6 // I0 save b6 (2 cyc)
517 ld8 r19=[r17],TI_AC_UTIME-TI_AC_LEAVE // time at leave kernel
521 sub r22=r19,r18 // stime before leave kernel
524 sub r18=r30,r19 // elapsed time in user mode
H A Dprocess.c132 printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19); show_regs()
H A Dasm-offsets.c108 DEFINE(IA64_PT_REGS_R19_OFFSET, offsetof (struct pt_regs, r19)); foo()
H A Dunaligned.c219 RPT(r16), RPT(r17), RPT(r18), RPT(r19),
H A Dmca.c936 copy_reg(&bank[19-16], ms->pmsa_nat_bits, &regs->r19, nat); finish_pt_regs()
H A Dunwind.c213 offsetof(struct pt_regs, r19),
/linux-4.1.27/arch/alpha/kernel/
H A Dsignal.c176 err |= __get_user(regs->r19, sc->sc_regs+19); restore_sigcontext()
311 err |= __put_user(regs->r19, sc->sc_regs+19); setup_sigcontext()
456 syscall_restart(unsigned long r0, unsigned long r19, syscall_restart() argument
469 regs->r19 = r19; syscall_restart()
488 * "r0" and "r19" are the registers we need to restore for system call
493 do_signal(struct pt_regs *regs, unsigned long r0, unsigned long r19) do_signal() argument
504 syscall_restart(r0, r19, regs, &ksig.ka); do_signal()
515 regs->r19 = r19; do_signal()
533 unsigned long r0, unsigned long r19) do_work_pending()
541 do_signal(regs, r0, r19); do_work_pending()
532 do_work_pending(struct pt_regs *regs, unsigned long thread_flags, unsigned long r0, unsigned long r19) do_work_pending() argument
H A Dptrace.c86 PT_REG( r16), PT_REG( r17), PT_REG( r18), PT_REG( r19),
324 audit_syscall_entry(regs->r0, regs->r16, regs->r17, regs->r18, regs->r19); syscall_trace_enter()
H A Dprocess.c279 childregs->r19 = 0; copy_thread()
316 dest[19] = pt->r19; dump_elf_thread()
H A Dtraps.c88 regs->r19, regs->r20, regs->r21); dik_show_regs()
672 printk("r19= %016lx r20= %016lx r21= %016lx\n", do_entUna()
767 R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26),
/linux-4.1.27/arch/microblaze/kernel/
H A Dentry-nommu.S87 swi r19, r1, PT_R19
129 lwi r19, r6, TI_FLAGS /* get flags in thread info */
132 andi r11, r19, _TIF_NEED_RESCHED
137 1: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME
177 lwi r19, r1, PT_R19
241 swi r19, r1, PT_R19
332 swi r19, r1, PT_R19
406 swi r19, r11, CC_R19
456 lwi r19, r11, CC_R19
485 addk r5, r0, r19
494 andi r11, r19, _TIF_NEED_RESCHED
499 1: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME
508 lwi r19, r6, TI_FLAGS /* get flags in thread info */
518 lwi r19, r6, TI_FLAGS /* get flags in thread info */
519 bnei r19, work_pending /* do an extra work if any bits are set */
552 lwi r19, r1, PT_R19
H A Dprocess.c35 pr_info(" r17=%08lX, r18=%08lX, r19=%08lX, r20=%08lX\n", show_regs()
36 regs->r17, regs->r18, regs->r19, regs->r20); show_regs()
67 ti->cpu_context.r19 = (unsigned long)arg; copy_thread()
H A Dentry.S195 swi r19, r1, PT_R19; \
231 lwi r19, r1, PT_R19; \
406 lwi r19, r11, TI_FLAGS; /* get flags in thread info */
407 andi r11, r19, _TIF_NEED_RESCHED;
416 andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
465 addk r5, r0, r19 /* ... and argument - in r19 */
580 lwi r19, r11, TI_FLAGS; /* get flags in thread info */
581 andi r11, r19, _TIF_NEED_RESCHED;
590 5: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
692 lwi r19, r11, TI_FLAGS; /* MS: get flags from thread info */
693 andi r11, r19, _TIF_NEED_RESCHED;
700 5: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
827 lwi r19, r11, TI_FLAGS; /* get flags in thread info */
828 andi r11, r19, _TIF_NEED_RESCHED;
837 5: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
891 swi r19, r11, CC_R19
934 lwi r19, r11, CC_R19
H A Dasm-offsets.c49 DEFINE(PT_R19, offsetof(struct pt_regs, r19)); main()
108 DEFINE(CC_R19, offsetof(struct cpu_context, r19)); main()
H A Dmcount.S35 swi r19, r1, 64; \
66 lwi r19, r1, 64; \
H A Dsignal.c71 COPY(r18); COPY(r19); COPY(r20); COPY(r21); restore_sigcontext()
132 COPY(r18); COPY(r19); COPY(r20); COPY(r21); setup_sigcontext()
/linux-4.1.27/arch/microblaze/lib/
H A Duaccess_old.S108 2: lwi r19, r6, 0x0004 + offset; \
116 10: swi r19, r5, 0x0004 + offset; \
196 swi r19, r1, 12
203 loop: /* r4, r19, r20, r21, r22, r23, r24, r25 are used for storing values */
219 lwi r19, r1, 12
239 lwi r19, r1, 12
/linux-4.1.27/arch/score/include/asm/
H A Dasmmacro.h44 sw r19, [r0, PT_R19] variable
141 lw r19, [r0, PT_R19] variable
/linux-4.1.27/arch/nios2/include/asm/
H A Dentry.h94 stw r19, SW_R19(sp) variable
108 ldw r19, SW_R19(sp) variable
H A Dptrace.h56 unsigned long r19; member in struct:switch_stack
H A Delf.h79 pr_reg[26] = sw->r19; \
/linux-4.1.27/arch/powerpc/crypto/
H A Dsha1-powerpc-asm.S156 lwz r19,12(r3)
165 add RD(0),RD(80),r19
H A Daes-spe-regs.h30 #define rW3 r19
H A Dsha1-spe-asm.S30 #define rW5 r19
68 evstdw r19,48(r1); \
81 evldw r19,48(r1); \
H A Dsha256-spe-asm.S39 #define rW5 r19
59 evstdw r19,48(r1); \
74 evldw r19,48(r1); \
H A Dmd5-asm.S33 #define rW10 r19
H A Daes-spe-modes.S96 evstdw r19,56(r1); \
110 evldw r19,56(r1); \
/linux-4.1.27/arch/ia64/lib/
H A Dip_fast_csum.S118 add r19=r26,r27
121 add r8=r8,r19
H A Dcopy_page.S26 #define saved_pfs r19
H A Dmemcpy_mck.S37 /* r19-r30 are temp for each code section */
39 #define src_pre_mem r19
551 #define A r19
H A Dclear_user.S28 #define saved_pfs r19
H A Dcopy_page_mck.S77 #define t3 r19
H A Dmemcpy.S31 # define t1 r19
H A Dstrlen.S75 #define src r19
H A Dstrlen_user.S77 #define src r19
H A Ddo_csum.S97 #define firstval r19
H A Dcopy_user.S59 #define len2 r19
/linux-4.1.27/arch/arc/include/asm/
H A Dunwind.h36 unsigned long r19; member in struct:arc700_regs
95 PTREGS_INFO(r19), \
H A Dptrace.h63 long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13; member in struct:callee_regs
H A Dentry.h123 PUSH r19
137 POP r19
/linux-4.1.27/arch/arc/kernel/
H A Dctx_sw.c37 "st.a r19, [sp, -4] \n\t" __switch_to()
97 "ld.ab r19, [sp, 4] \n\t" __switch_to()
/linux-4.1.27/arch/microblaze/include/uapi/asm/
H A Dptrace.h36 microblaze_reg_t r19; member in struct:pt_regs
H A Delf.h111 _r->r16 = _r->r17 = _r->r18 = _r->r19 = \
/linux-4.1.27/arch/powerpc/boot/
H A Dppc_asm.h48 #define r19 19 macro
/linux-4.1.27/arch/hexagon/include/uapi/asm/
H A Duser.h32 unsigned long r19; member in struct:user_regs_struct
H A Dregisters.h142 unsigned long r19; member in struct:pt_regs::__anon1456::__anon1457
/linux-4.1.27/arch/alpha/include/uapi/asm/
H A Dptrace.h29 unsigned long r19; member in struct:pt_regs
/linux-4.1.27/arch/arc/include/uapi/asm/
H A Dptrace.h45 long r19, r18, r17, r16, r15, r14, r13; member in struct:user_regs_struct::__anon140
/linux-4.1.27/tools/testing/selftests/powerpc/switch_endian/
H A Dswitch_endian_test.S45 addi r19, r15, 19
/linux-4.1.27/arch/sh/boot/compressed/
H A Dhead_64.S153 movi datalabel (CONFIG_MEMORY_START + 0x2000)+1, r19
154 ptabs r19, tr0
/linux-4.1.27/arch/powerpc/kernel/
H A Dswsusp_asm64.S101 SAVE_REGISTER(r19)
218 RESTORE_REGISTER(r19)
H A Dhead_fsl_booke.S87 lwz r19,(is_second_reloc - 0b)@l(r3)
90 cmpwi r19,1
136 cmpwi r19,1
H A Dkgdb.c293 { "r19", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[19]) },
H A Dhead_8xx.S590 add r10, r10, r19 ;b 151f
/linux-4.1.27/arch/sh/mm/
H A DMakefile64 -ffixed-r13 -ffixed-r14 -ffixed-r16 -ffixed-r17 -ffixed-r19 \
/linux-4.1.27/arch/tile/include/asm/
H A Dbarrier.h41 "r15", "r16", "r17", "r18", "r19", __mb_incoherent()
/linux-4.1.27/arch/nios2/kernel/
H A Dasm-offsets.c70 OFFSET(SW_R19, switch_stack, r19); main()
H A Dsignal.c70 err |= __get_user(sw->r19, &gregs[18]); rt_restore_ucontext()
152 err |= __put_user(sw->r19, &gregs[18]); rt_setup_ucontext()
H A Dkgdb.c52 { "r19", GDB_SIZEOF_REG, -1 },
H A Dinsnemu.S146 stw r19, 76(sp)
577 ldw r19, 76(sp)
/linux-4.1.27/arch/unicore32/kernel/
H A Dentry.S142 * Interrupt handling. Preserves r17, r18, r19
376 @ fall through to the emulation code, which returns using r19 if
383 adr r19, ret_from_exception
400 * r19 = normal "successful" return address
411 @ r19 = return address
419 mov lr, r19 @ setup for a return to the user code
H A Dprocess.c151 printk(KERN_DEFAULT "r19: %08lx r18: %08lx r17: %08lx r16: %08lx\n", __show_regs()
/linux-4.1.27/arch/powerpc/kvm/
H A Dbooke_interrupts.S188 stw r19, VCPU_GPR(R19)(r4)
268 lwz r19, VCPU_GPR(R19)(r4)
306 stw r19, VCPU_GPR(R19)(r4)
326 lwz r19, HOST_NV_GPR(R19)(r1)
371 stw r19, HOST_NV_GPR(R19)(r1)
391 lwz r19, VCPU_GPR(R19)(r4)
H A Dbookehv_interrupts.S127 PPC_STL r19, VCPU_GPR(R19)(r4)
459 PPC_LL r19, VCPU_GPR(R19)(r4)
493 PPC_STL r19, VCPU_GPR(R19)(r4)
513 PPC_LL r19, HOST_NV_GPR(R19)(r1)
556 PPC_STL r19, HOST_NV_GPR(R19)(r1)
576 PPC_LL r19, VCPU_GPR(R19)(r4)
H A Dbook3s_interrupts.S47 PPC_LL r19, VCPU_GPR(R19)(vcpu); \
191 PPC_STL r19, VCPU_GPR(R19)(r7)
H A Dbook3s_hv_rmhandlers.S737 ld r19, VCPU_GPR(R19)(r4)
1312 std r19, VCPU_GPR(R19)(r9)
2125 std r19, VCPU_GPR(R19)(r3)
2236 ld r19, VCPU_GPR(R19)(r4)
/linux-4.1.27/arch/unicore32/include/asm/
H A Dthread_info.h50 __u32 r19; member in struct:cpu_context_save
/linux-4.1.27/arch/hexagon/kernel/
H A Dvm_events.c68 regs->r19); show_regs()
H A Dkgdb.c51 { "r19", GDB_SIZEOF_REG, offsetof(struct pt_regs, r19)},
/linux-4.1.27/arch/alpha/include/asm/
H A Da.out-core.h59 dump->regs[EF_A3] = pt->r19; aout_dump_thread()
/linux-4.1.27/arch/hexagon/include/asm/
H A Delf.h138 DEST.r19 = REGS->r19; \
H A Dprocessor.h114 unsigned long r19; member in struct:hexagon_switch_stack::__anon1413::__anon1414
/linux-4.1.27/arch/powerpc/lib/
H A Dcopyuser_power7.S79 ld r19,STK_REG(R19)(r1)
150 std r19,STK_REG(R19)(r1)
175 err2; ld r19,104(r4)
192 err2; std r19,104(r3)
205 ld r19,STK_REG(R19)(r1)
H A Dmemcpy_power7.S83 std r19,STK_REG(R19)(r1)
108 ld r19,104(r4)
125 std r19,104(r3)
138 ld r19,STK_REG(R19)(r1)
H A Dcrtsavres.S336 std r19,-104(r1)
393 ld r19,-104(r1)
/linux-4.1.27/tools/testing/selftests/powerpc/copyloops/
H A Dcopyuser_power7.S79 ld r19,STK_REG(R19)(r1)
150 std r19,STK_REG(R19)(r1)
175 err2; ld r19,104(r4)
192 err2; std r19,104(r3)
205 ld r19,STK_REG(R19)(r1)
H A Dmemcpy_power7.S83 std r19,STK_REG(R19)(r1)
108 ld r19,104(r4)
125 std r19,104(r3)
138 ld r19,STK_REG(R19)(r1)
/linux-4.1.27/arch/tile/kernel/
H A Dregs_32.S110 r16, r17, r18, r19, r20, r21, r22, r23, \
H A Dregs_64.S110 r16, r17, r18, r19, r20, r21, r22, r23, \
H A Dkgdb.c48 { "r19", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[19])},
H A Dintvec_32.S432 push_reg r19, r52
1053 { move r18, zero; move r19, zero }
1096 pop_reg r19
H A Dintvec_64.S628 push_reg r19, r52
1085 { move r19, zero; move r20, zero }
1132 pop_reg r19
/linux-4.1.27/arch/tile/kernel/vdso/
H A Dvgettimeofday.c168 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", vdso_fallback_gettime()
/linux-4.1.27/arch/microblaze/include/asm/
H A Dthread_info.h42 __u32 r19; member in struct:cpu_context
/linux-4.1.27/arch/sh/kernel/cpu/sh5/
H A Dentry.S740 st.q SP, FRAME_R(19), r19
998 ld.q SP, FRAME_R(19), r19
1763 st.q r0, 0x098, r19
1957 movi LVBR_block, r19
1958 andi r19, -4, r19 /* reset MMUOFF + reserved */
1964 putcon r19, VBR
1971 or r19, ZERO, r30
1972 add r19, r29, r19
1992 bne r19, r21, tr1
/linux-4.1.27/arch/score/kernel/
H A Dentry.S346 sw r19, [\reg, THREAD_REG19];
362 lw r19, [\reg, THREAD_REG19];
/linux-4.1.27/arch/openrisc/kernel/
H A Dentry.S75 l.lwz r19,PT_GPR19(r1) ;\
113 l.sw PT_GPR19(r1),r19 ;\
151 l.sw PT_GPR19(r1),r19 ;\
713 /* Here we use r13-r19 (odd) as scratch regs */
720 DISABLE_INTERRUPTS(r17,r19)
1123 DISABLE_INTERRUPTS(r17,r19)
H A Dhead.S473 CLEAR_GPR(r19)
608 CLEAR_GPR(r19)
/linux-4.1.27/arch/tile/lib/
H A Dmemcpy_32.S285 EX: { lw r19, r1; addi r1, r1, 4; move zero, r17 } /* r19 = WORD_5 */
306 EX: { sw r0, r19; addi r0, r0, 4 } /* store(WORD_5) */
/linux-4.1.27/drivers/net/wireless/b43/
H A Dradio_2059.c36 r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \
57 .radio_rxtx92 = r19, \
H A Dradio_2057.c130 r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \
151 .radio_lna2g_tune_core0 = r19, \
H A Dradio_2055.c272 r12, r13, r14, r15, r16, r17, r18, r19, r20, r21) \
292 .radio_c2_rx_rfr1 = r19, \
H A Dradio_2056.c3039 r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \
3061 .radio_tx0_intpaa_boost_tune = r19, \
/linux-4.1.27/arch/ia64/include/uapi/asm/
H A Dptrace.h124 unsigned long r19; /* scratch */ member in struct:pt_regs
/linux-4.1.27/arch/powerpc/include/asm/
H A Dppc_asm.h588 #define r19 %r19 macro
/linux-4.1.27/sound/soc/codecs/
H A Dcs42l52.c81 { CS42L52_ADCB_MIXER_VOL, 0x80 }, /* r19 ADCB Mixer Volume */
H A Dcs42l56.c91 { 25, 0x00 }, /* r19 - Channel Mixer & Swap */
H A Dcs42l73.c69 { 25, 0x00 }, /* r19 - Playback Digital Ctl */
/linux-4.1.27/drivers/media/usb/gspca/
H A Dsonixb.c257 0x68, 0x8f, MCK_INIT1, /* r17 .. r19 */
/linux-4.1.27/drivers/net/ethernet/tile/
H A Dtilepro.c333 "r15", "r16", "r17", "r18", "r19", __netio_fastio1()
/linux-4.1.27/arch/powerpc/xmon/
H A Dxmon.c2499 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
/linux-4.1.27/arch/arm/mach-omap2/
H A Dmux34xx.c856 _OMAP3_BALLENTRY(MCBSP2_DX, "r19", NULL),

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