Searched refs:prcmu_clk (Results 1 – 2 of 2) sorted by relevance
21 static struct clk *prcmu_clk[PRCMU_NUM_CLKS]; variable76 prcmu_clk[PRCMU_PLLSOC0] = clk; in u8500_of_clk_init()80 prcmu_clk[PRCMU_PLLSOC1] = clk; in u8500_of_clk_init()84 prcmu_clk[PRCMU_PLLDDR] = clk; in u8500_of_clk_init()112 prcmu_clk[PRCMU_SGACLK] = clk; in u8500_of_clk_init()115 prcmu_clk[PRCMU_UARTCLK] = clk; in u8500_of_clk_init()118 prcmu_clk[PRCMU_MSP02CLK] = clk; in u8500_of_clk_init()121 prcmu_clk[PRCMU_MSP1CLK] = clk; in u8500_of_clk_init()124 prcmu_clk[PRCMU_I2CCLK] = clk; in u8500_of_clk_init()127 prcmu_clk[PRCMU_SLIMCLK] = clk; in u8500_of_clk_init()[all …]
55 prcmu_clk: prcmu-clock { label82 clocks = <&prcmu_clk PRCMU_TIMCLK>, <&prcc_pclk 6 6>;289 clocks = <&prcmu_clk PRCMU_DMACLK>;310 clocks = <&prcmu_clk PRCMU_ARMSS>;1027 clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */1028 <&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */1029 <&prcmu_clk PRCMU_PLLDSI>, /* HDMI clock */1030 <&prcmu_clk PRCMU_DSI0CLK>, /* DSI 0 */1031 <&prcmu_clk PRCMU_DSI1CLK>, /* DSI 1 */1032 <&prcmu_clk PRCMU_DSI0ESCCLK>, /* TVout clock 0 */[all …]