Searched refs:pll_base (Results 1 – 6 of 6) sorted by relevance
| /linux-4.1.27/arch/arm/mach-imx/ |
| D | clk-imx51-imx53.c | 321 void __iomem *pll_base; in mx50_clocks_init() local
324 pll_base = ioremap(MX53_DPLL1_BASE, SZ_16K); in mx50_clocks_init()
325 WARN_ON(!pll_base); in mx50_clocks_init()
326 clk[IMX5_CLK_PLL1_SW] = imx_clk_pllv2("pll1_sw", "osc", pll_base); in mx50_clocks_init()
328 pll_base = ioremap(MX53_DPLL2_BASE, SZ_16K); in mx50_clocks_init()
329 WARN_ON(!pll_base); in mx50_clocks_init()
330 clk[IMX5_CLK_PLL2_SW] = imx_clk_pllv2("pll2_sw", "osc", pll_base); in mx50_clocks_init()
332 pll_base = ioremap(MX53_DPLL3_BASE, SZ_16K); in mx50_clocks_init()
333 WARN_ON(!pll_base); in mx50_clocks_init()
334 clk[IMX5_CLK_PLL3_SW] = imx_clk_pllv2("pll3_sw", "osc", pll_base); in mx50_clocks_init()
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| /linux-4.1.27/drivers/video/fbdev/omap2/dss/ |
| D | video-pll.c | 140 void __iomem *pll_base, *clkctrl_base; in dss_video_pll_init() local
154 pll_base = devm_ioremap_resource(&pdev->dev, res); in dss_video_pll_init()
155 if (IS_ERR(pll_base)) { in dss_video_pll_init()
157 return ERR_CAST(pll_base); in dss_video_pll_init()
197 pll->base = pll_base; in dss_video_pll_init()
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| D | dsi.c | 304 void __iomem *pll_base; member
450 case DSI_PLL: base = dsi->pll_base; break; in dsi_write_reg()
466 case DSI_PLL: base = dsi->pll_base; break; in dsi_read_reg()
5243 pll->base = dsi->pll_base; in dsi_init_pll_data()
5369 dsi->pll_base = devm_ioremap(&dsidev->dev, res->start, in omap_dsihw_probe()
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| /linux-4.1.27/drivers/clk/st/ |
| D | clkgen-pll.c | 645 void __iomem *pll_base; in clkgen_c32_pll_setup() local
662 pll_base = clkgen_get_register_base(np); in clkgen_c32_pll_setup()
663 if (!pll_base) in clkgen_c32_pll_setup()
666 clk = clkgen_pll_register(parent_name, data, pll_base, np->name); in clkgen_c32_pll_setup()
693 clk = clkgen_odf_register(pll_name, pll_base, data, in clkgen_c32_pll_setup()
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| /linux-4.1.27/arch/arm/mach-tegra/ |
| D | sleep-tegra30.S | 99 .macro pll_enable, rd, r_car_base, pll_base, pll_misc
100 ldr \rd, [\r_car_base, #\pll_base]
103 streq \rd, [\r_car_base, #\pll_base]
116 .macro pll_locked, rd, r_car_base, pll_base
118 ldr \rd, [\r_car_base, #\pll_base]
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| D | sleep-tegra20.S | 56 .macro pll_enable, rd, r_car_base, pll_base
57 ldr \rd, [\r_car_base, #\pll_base]
60 streq \rd, [\r_car_base, #\pll_base]
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