Searched refs:odf (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/drivers/clk/st/
H A Dclkgen-pll.c52 struct clkgen_field odf[C32_MAX_ODFS]; member in struct:clkgen_pll_data
85 .odf = { CLKGEN_FIELD(0x54, C32_ODF_MASK, 4),
102 .odf = { CLKGEN_FIELD(0x58, C32_ODF_MASK, 4),
120 .odf = { CLKGEN_FIELD(0x0, C32_ODF_MASK, 3) },
131 .odf = { CLKGEN_FIELD(0x8, C32_ODF_MASK, 8),
144 .odf = { CLKGEN_FIELD(0x0, C32_ODF_MASK, 10) },
155 .odf = { CLKGEN_FIELD(0x8, C32_ODF_MASK, 8) },
166 .odf = { CLKGEN_FIELD(0x8, C32_ODF_MASK, 8),
179 .odf = { CLKGEN_FIELD(0x0, C32_ODF_MASK, 10) },
190 .odf = { CLKGEN_FIELD(0x2b4, C32_ODF_MASK, 0) },
202 .odf = { CLKGEN_FIELD(0x2b4, C32_ODF_MASK, 0) },
214 .odf = { CLKGEN_FIELD(0x2dc, C32_ODF_MASK, 0) },
226 .odf = { CLKGEN_FIELD(0x1b0, C32_ODF_MASK, 8) },
350 unsigned long odf, ldf, idf; recalc_stm_pll1200c32() local
356 odf = CLKGEN_READ(pll, odf[0]); recalc_stm_pll1200c32()
362 if (!odf) /* odf==0 means 1 */ recalc_stm_pll1200c32()
363 odf = 1; recalc_stm_pll1200c32()
366 rate = (((parent_rate / 1000) * ldf) / (odf * idf)) * 1000; recalc_stm_pll1200c32()
549 int odf, clkgen_odf_register()
565 gate->reg = reg + pll_data->odf_gate[odf].offset; clkgen_odf_register()
566 gate->bit_idx = pll_data->odf_gate[odf].shift; clkgen_odf_register()
576 div->reg = reg + pll_data->odf[odf].offset; clkgen_odf_register()
577 div->shift = pll_data->odf[odf].shift; clkgen_odf_register()
578 div->width = fls(pll_data->odf[odf].mask); clkgen_odf_register()
646 int num_odfs, odf; clkgen_c32_pll_setup() local
685 for (odf = 0; odf < num_odfs; odf++) { clkgen_c32_pll_setup()
690 odf, &clk_name)) clkgen_c32_pll_setup()
694 odf, &clkgena_c32_odf_lock, clk_name); clkgen_c32_pll_setup()
698 clk_data->clks[odf] = clk; clkgen_c32_pll_setup()
546 clkgen_odf_register(const char *parent_name, void * __iomem reg, struct clkgen_pll_data *pll_data, int odf, spinlock_t *odf_lock, const char *odf_name) clkgen_odf_register() argument
/linux-4.1.27/drivers/gpu/drm/sti/
H A Dsti_hdmi_tx3g4c28phy.c46 uint32_t odf; member in struct:plldividers_s
77 u32 val, tmdsck, idf, odf, pllctrl = 0; sti_hdmi_tx3g4c28phy_start() local
87 odf = plldividers[i].odf; sti_hdmi_tx3g4c28phy_start()
109 pllctrl |= odf << PLL_CFG_ODF_SHIFT; sti_hdmi_tx3g4c28phy_start()

Completed in 77 milliseconds